DragonFlyBSD

dev/netif/mii_layer/rgephy.c   optional miibus

SRCS   += rgephy.c ruephy.c nvphy.c

/* This is the OUI of the gigE PHY in the RealTek 8169S/8110S chips */

oui xxREALTEK          0x000732

model xxREALTEK RTL8169S       0x0011 RTL8169S/8110S media interface

/* $DragonFly$ */

 * DragonFly: src/sys/dev/netif/mii_layer/miidevs,v 1.5 2004/02/10 21:14:14 hmp Exp 

/* This is the OUI of the gigE PHY in the RealTek 8169S/8110S chips */

#define    MII_OUI_xxREALTEK   0x000732    /*  */

#define    MII_MODEL_xxREALTEK_RTL8169S    0x0011

#define    MII_STR_xxREALTEK_RTL8169S  "RTL8169S/8110S media interface"

/*-

 * Copyright (c) 2003

 *  Bill Paul <wpaul@windriver.com>.  All rights reserved.

 *

 * Redistribution and use in source and binary forms, with or without

 * modification, are permitted provided that the following conditions

 * are met:

 * 1. Redistributions of source code must retain the above copyright

 *    notice, this list of conditions and the following disclaimer.

 * 2. Redistributions in binary form must reproduce the above copyright

 *    notice, this list of conditions and the following disclaimer in the

 *    documentation and/or other materials provided with the distribution.

 * 3. All advertising materials mentioning features or use of this software

 *    must display the following acknowledgement:

 *  This product includes software developed by Bill Paul.

 * 4. Neither the name of the author nor the names of any co-contributors

 *    may be used to endorse or promote products derived from this software

 *    without specific prior written permission.

 *

 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND

 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD

 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR

 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF

 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN

 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)

 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF

 * THE POSSIBILITY OF SUCH DAMAGE.

 *

 * $FreeBSD: /repoman/r/ncvs/src/sys/dev/mii/rgephy.c,v 1.7 2005/09/30 19:39:27 imp Exp $

 * $DragonFly: $

 */

#include <sys/cdefs.h>

/*

 * Driver for the RealTek 8169S/8110S internal 10/100/1000 PHY.

 */

#include <sys/param.h>

#include <sys/systm.h>

#include <sys/kernel.h>

#include <sys/socket.h>

#include <sys/bus.h>

#include <machine/clock.h>

#include <net/if.h>

#include <net/if_arp.h>

#include <net/if_media.h>

#include <dev/netif/mii_layer/mii.h>

#include <dev/netif/mii_layer/miivar.h>

#include <dev/netif/mii_layer/rgephyreg.h>

#include "miidevs.h"

#include "miibus_if.h"

#include <machine/bus.h>

#include <dev/netif/re/if_rereg.h>

static int  rgephy_probe(device_t);

static int  rgephy_attach(device_t);

static int  rgephy_detach(device_t);

static void rgephy_update(struct mii_softc *, int);

static device_method_t rgephy_methods[] = {

    /* device interface */

    DEVMETHOD(device_probe,     rgephy_probe),

    DEVMETHOD(device_attach,    rgephy_attach),

    DEVMETHOD(device_detach,    rgephy_detach),

    DEVMETHOD(device_shutdown,  bus_generic_shutdown),

    { 0, 0 }

};

static devclass_t rgephy_devclass;

static driver_t rgephy_driver = {

    "rgephy",

    rgephy_methods,

    sizeof(struct mii_softc)

};

DRIVER_MODULE(rgephy, miibus, rgephy_driver, rgephy_devclass, 0, 0);

static int  rgephy_service(struct mii_softc *, struct mii_data *, int);

static void rgephy_status(struct mii_softc *);

static int  rgephy_mii_phy_auto(struct mii_softc *);

static void rgephy_reset(struct mii_softc *);

static void rgephy_loop(struct mii_softc *);

static void rgephy_load_dspcode(struct mii_softc *);

static int  rgephy_mii_model;

static int

rgephy_probe(device_t dev)

{

    struct mii_attach_args *ma;

    ma = device_get_ivars(dev);

    if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxREALTEK &&

        MII_MODEL(ma->mii_id2) == MII_MODEL_xxREALTEK_RTL8169S) {

        device_set_desc(dev, MII_STR_xxREALTEK_RTL8169S);

        return(0);

    }

    return(ENXIO);

}

static int

rgephy_attach(device_t dev)

{

    struct mii_softc *sc;

    struct mii_attach_args *ma;

    struct mii_data *mii;

    const char *sep = "";

    sc = device_get_softc(dev);

    ma = device_get_ivars(dev);

    sc->mii_dev = device_get_parent(dev);

    mii = device_get_softc(sc->mii_dev);

    LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);

    sc->mii_inst = mii->mii_instance;

    sc->mii_phy = ma->mii_phyno;

    sc->mii_service = rgephy_service;

    sc->mii_pdata = mii;

    sc->mii_flags |= MIIF_NOISOLATE;

    mii->mii_instance++;

#define ADD(m, c)   ifmedia_add(&mii->mii_media, (m), (c), NULL)

#define PRINT(s)    printf("%s%s", sep, s); sep = ", "

    ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),

        BMCR_ISO);

#if 0

    ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),

        BMCR_LOOP|BMCR_S100);

#endif

    rgephy_mii_model = MII_MODEL(ma->mii_id2);

    rgephy_reset(sc);

    sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;

    sc->mii_capabilities &= ~BMSR_ANEG;

    device_printf(dev, " ");

    mii_add_media(sc, sc->mii_capabilities);

    ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, sc->mii_inst),

        RGEPHY_BMCR_FDX);

    PRINT(", 1000baseTX");

    ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, sc->mii_inst), 0);

    PRINT("1000baseTX-FDX");

    ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);

    PRINT("auto");

    printf("\n");

#undef ADD

#undef PRINT

    MIIBUS_MEDIAINIT(sc->mii_dev);

    return(0);

}

static int

rgephy_detach(device_t dev)

{

    struct mii_softc    *sc;

    struct mii_data *mii;

    sc = device_get_softc(dev);

    mii = device_get_softc(device_get_softc(dev));

    mii_phy_auto_stop(sc);

    sc->mii_dev = NULL;

    LIST_REMOVE(sc, mii_list);

    return (0);

}

static void

rgephy_update(struct mii_softc *sc, int cmd)

{

    struct mii_data *mii = sc->mii_pdata;

    if (sc->mii_active != mii->mii_media_active ||

        cmd == MII_MEDIACHG) {

        MIIBUS_STATCHG(sc->mii_dev);

        sc->mii_active = mii->mii_media_active;

    }

/*

    if (sc->mii_status != mii->mii_media_status) {

        MIIBUS_LINKCHG(sc->mii_dev);

        sc->mii_status = mii->mii_media_status;

    }

*/

}

static int

rgephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)

{

    struct ifmedia_entry *ife = mii->mii_media.ifm_cur;

    int reg, speed, gig;

    switch (cmd) {

    case MII_POLLSTAT:

        /*

         * If we're not polling our PHY instance, just return.

         */

        if (IFM_INST(ife->ifm_media) != sc->mii_inst)

            return (0);

        break;

    case MII_MEDIACHG:

        /*

         * If the media indicates a different PHY instance,

         * isolate ourselves.

         */

        if (IFM_INST(ife->ifm_media) != sc->mii_inst) {

            reg = PHY_READ(sc, MII_BMCR);

            PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);

            return (0);

        }

        /*

         * If the interface is not up, don't do anything.

         */

        if ((mii->mii_ifp->if_flags & IFF_UP) == 0)

            break;

        rgephy_reset(sc);   /* XXX hardware bug work-around */

        switch (IFM_SUBTYPE(ife->ifm_media)) {

        case IFM_AUTO:

#ifdef foo

            /*

             * If we're already in auto mode, just return.

             */

            if (PHY_READ(sc, RGEPHY_MII_BMCR) & RGEPHY_BMCR_AUTOEN)

                return (0);

#endif

            (void) rgephy_mii_phy_auto(sc);

            break;

        case IFM_1000_T:

            speed = RGEPHY_S1000;

            goto setit;

        case IFM_100_TX:

            speed = RGEPHY_S100;

            goto setit;

        case IFM_10_T:

            speed = RGEPHY_S10;

setit:

            rgephy_loop(sc);

            if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {

                speed |= RGEPHY_BMCR_FDX;

                gig = RGEPHY_1000CTL_AFD;

            } else {

                gig = RGEPHY_1000CTL_AHD;

            }

            PHY_WRITE(sc, RGEPHY_MII_1000CTL, 0);

            PHY_WRITE(sc, RGEPHY_MII_BMCR, speed);

            PHY_WRITE(sc, RGEPHY_MII_ANAR, RGEPHY_SEL_TYPE);

            if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T) 

                break;

            PHY_WRITE(sc, RGEPHY_MII_1000CTL, gig);

            PHY_WRITE(sc, RGEPHY_MII_BMCR,

                speed|RGEPHY_BMCR_AUTOEN|RGEPHY_BMCR_STARTNEG);

            /*

             * When settning the link manually, one side must

             * be the master and the other the slave. However

             * ifmedia doesn't give us a good way to specify

             * this, so we fake it by using one of the LINK

             * flags. If LINK0 is set, we program the PHY to

             * be a master, otherwise it's a slave.

             */

            if ((mii->mii_ifp->if_flags & IFF_LINK0)) {

                PHY_WRITE(sc, RGEPHY_MII_1000CTL,

                    gig|RGEPHY_1000CTL_MSE|RGEPHY_1000CTL_MSC);

            } else {

                PHY_WRITE(sc, RGEPHY_MII_1000CTL,

                    gig|RGEPHY_1000CTL_MSE);

            }

            break;

#ifdef foo

        case IFM_NONE:

            PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);

            break;

#endif

        case IFM_100_T4:

        default:

            return (EINVAL);

        }

        break;

    case MII_TICK:

        /*

         * If we're not currently selected, just return.

         */

        if (IFM_INST(ife->ifm_media) != sc->mii_inst)

            return (0);

        /*

         * Is the interface even up?

         */

        if ((mii->mii_ifp->if_flags & IFF_UP) == 0)

            return (0);

        /*

         * Only used for autonegotiation.

         */

        if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)

            break;

        /*

         * Check to see if we have link.  If we do, we don't

         * need to restart the autonegotiation process.  Read

         * the BMSR twice in case it's latched.

         */

        reg = PHY_READ(sc, RE_GMEDIASTAT);

        if (reg & RE_GMEDIASTAT_LINK)

            break;

        /*

         * Only retry autonegotiation every 17 seconds.

         */

        if (++sc->mii_ticks <= 17/*10*/)

            break;

        sc->mii_ticks = 0;

        rgephy_mii_phy_auto(sc);

        return (0);

    }

    /* Update the media status. */

    rgephy_status(sc);

    /*

     * Callback if something changed. Note that we need to poke

     * the DSP on the RealTek PHYs if the media changes.

     *

     */

    if (sc->mii_active != mii->mii_media_active || 

   /* sc->mii_status != mii->mii_media_status || */

        cmd == MII_MEDIACHG) {

        rgephy_load_dspcode(sc);

    }

    rgephy_update(sc, cmd);

    return (0);

}

static void

rgephy_status(struct mii_softc *sc)

{

    struct mii_data *mii = sc->mii_pdata;

    int bmsr, bmcr;

    mii->mii_media_status = IFM_AVALID;

    mii->mii_media_active = IFM_ETHER;

    bmsr = PHY_READ(sc, RE_GMEDIASTAT);

    if (bmsr & RE_GMEDIASTAT_LINK)

        mii->mii_media_status |= IFM_ACTIVE;

    bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);

    bmcr = PHY_READ(sc, RGEPHY_MII_BMCR);

    if (bmcr & RGEPHY_BMCR_LOOP)

        mii->mii_media_active |= IFM_LOOP;

    if (bmcr & RGEPHY_BMCR_AUTOEN) {

        if ((bmsr & RGEPHY_BMSR_ACOMP) == 0) {

            /* Erg, still trying, I guess... */

            mii->mii_media_active |= IFM_NONE;

            return;

        }

    }

    bmsr = PHY_READ(sc, RE_GMEDIASTAT);

    if (bmsr & RE_GMEDIASTAT_10MBPS)

        mii->mii_media_active |= IFM_10_T;

    if (bmsr & RE_GMEDIASTAT_100MBPS)

        mii->mii_media_active |= IFM_100_TX;

    if (bmsr & RE_GMEDIASTAT_1000MBPS)

        mii->mii_media_active |= IFM_1000_T;

    if (bmsr & RE_GMEDIASTAT_FDX)

        mii->mii_media_active |= IFM_FDX;

    return;

}

static int

rgephy_mii_phy_auto(struct mii_softc *mii)

{

    rgephy_loop(mii);

    rgephy_reset(mii);

    PHY_WRITE(mii, RGEPHY_MII_ANAR, mii_bmsr_media_to_anar(mii));

    DELAY(1000);

    PHY_WRITE(mii, RGEPHY_MII_1000CTL, RGEPHY_1000CTL_AFD);

    DELAY(1000);

    PHY_WRITE(mii, RGEPHY_MII_BMCR,

        RGEPHY_BMCR_AUTOEN | RGEPHY_BMCR_STARTNEG);

    DELAY(100);

    return (EJUSTRETURN);

}

static void

rgephy_loop(struct mii_softc *sc)

{

    u_int32_t bmsr;

    int i;

    PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_PDOWN);

    DELAY(1000);

    for (i = 0; i < 15000; i++) {

        bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);

        if (!(bmsr & RGEPHY_BMSR_LINK)) {

#if 0

            device_printf(sc->mii_dev, "looped %d\n", i);

#endif

            break;

        }

        DELAY(10);

    }

}

#define PHY_SETBIT(x, y, z) \

    PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))

#define PHY_CLRBIT(x, y, z) \

    PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))

/*

 * Initialize RealTek PHY per the datasheet. The DSP in the PHYs of

 * existing revisions of the 8169S/8110S chips need to be tuned in

 * order to reliably negotiate a 1000Mbps link. Later revs of the

 * chips may not require this software tuning.

 */

static void

rgephy_load_dspcode(struct mii_softc *sc)

{

    int val;

    PHY_WRITE(sc, 31, 0x0001);

    PHY_WRITE(sc, 21, 0x1000);

    PHY_WRITE(sc, 24, 0x65C7);

    PHY_CLRBIT(sc, 4, 0x0800);

    val = PHY_READ(sc, 4) & 0xFFF;

    PHY_WRITE(sc, 4, val);

    PHY_WRITE(sc, 3, 0x00A1);

    PHY_WRITE(sc, 2, 0x0008);

    PHY_WRITE(sc, 1, 0x1020);

    PHY_WRITE(sc, 0, 0x1000);

    PHY_SETBIT(sc, 4, 0x0800);

    PHY_CLRBIT(sc, 4, 0x0800);

    val = (PHY_READ(sc, 4) & 0xFFF) | 0x7000;

    PHY_WRITE(sc, 4, val);

    PHY_WRITE(sc, 3, 0xFF41);

    PHY_WRITE(sc, 2, 0xDE60);

    PHY_WRITE(sc, 1, 0x0140);

    PHY_WRITE(sc, 0, 0x0077);

    val = (PHY_READ(sc, 4) & 0xFFF) | 0xA000;

    PHY_WRITE(sc, 4, val);

    PHY_WRITE(sc, 3, 0xDF01);

    PHY_WRITE(sc, 2, 0xDF20);

    PHY_WRITE(sc, 1, 0xFF95);

    PHY_WRITE(sc, 0, 0xFA00);

    val = (PHY_READ(sc, 4) & 0xFFF) | 0xB000;

    PHY_WRITE(sc, 4, val);

    PHY_WRITE(sc, 3, 0xFF41);

    PHY_WRITE(sc, 2, 0xDE20);

    PHY_WRITE(sc, 1, 0x0140);

    PHY_WRITE(sc, 0, 0x00BB);

    val = (PHY_READ(sc, 4) & 0xFFF) | 0xF000;

    PHY_WRITE(sc, 4, val);

    PHY_WRITE(sc, 3, 0xDF01);

    PHY_WRITE(sc, 2, 0xDF20);

    PHY_WRITE(sc, 1, 0xFF95);

    PHY_WRITE(sc, 0, 0xBF00);

    PHY_SETBIT(sc, 4, 0x0800);

    PHY_CLRBIT(sc, 4, 0x0800);

    PHY_WRITE(sc, 31, 0x0000);

    DELAY(40);

}

static void

rgephy_reset(struct mii_softc *sc)

{

    mii_phy_reset(sc);

    DELAY(1000);

    rgephy_load_dspcode(sc);

    return;

}

/*-

 * Copyright (c) 2003

 * Bill Paul <wpaul@windriver.com>.  All rights reserved.

 *

 * Redistribution and use in source and binary forms, with or without

 * modification, are permitted provided that the following conditions

 * are met:

 * 1. Redistributions of source code must retain the above copyright

 *    notice, this list of conditions and the following disclaimer.

 * 2. Redistributions in binary form must reproduce the above copyright

 *    notice, this list of conditions and the following disclaimer in the

 *    documentation and/or other materials provided with the distribution.

 * 3. All advertising materials mentioning features or use of this software

 *    must display the following acknowledgement:

 * This product includes software developed by Bill Paul.

 * 4. Neither the name of the author nor the names of any co-contributors

 *    may be used to endorse or promote products derived from this software

 *    without specific prior written permission.

 *

 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND

 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD

 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR

 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF

 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN

 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)

 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF

 * THE POSSIBILITY OF SUCH DAMAGE.

 *

 * $FreeBSD: src/sys/dev/mii/rgephyreg.h,v 1.2 2005/01/06 01:42:56 imp Exp $

 */

#ifndef _DEV_MII_RGEPHYREG_H_

#define    _DEV_MII_RGEPHYREG_H_

/*

 * RealTek 8169S/8110S gigE PHY registers

 */

#define RGEPHY_MII_BMCR        0x00

#define RGEPHY_BMCR_RESET  0x8000

#define RGEPHY_BMCR_LOOP   0x4000

#define RGEPHY_BMCR_SPD0   0x2000  /* speed select, lower bit */

#define RGEPHY_BMCR_AUTOEN 0x1000  /* Autoneg enabled */

#define RGEPHY_BMCR_PDOWN  0x0800  /* Power down */

#define RGEPHY_BMCR_ISO        0x0400  /* Isolate */

#define RGEPHY_BMCR_STARTNEG   0x0200  /* Restart autoneg */

#define RGEPHY_BMCR_FDX        0x0100  /* Duplex mode */

#define RGEPHY_BMCR_CTEST  0x0080  /* Collision test enable */

#define RGEPHY_BMCR_SPD1   0x0040  /* Speed select, upper bit */

#define RGEPHY_S1000       RGEPHY_BMCR_SPD1    /* 1000mbps */

#define RGEPHY_S100        RGEPHY_BMCR_SPD0    /* 100mpbs */

#define RGEPHY_S10     0           /* 10mbps */

#define RGEPHY_MII_BMSR        0x01

#define RGEPHY_BMSR_100T4  0x8000  /* 100 base T4 capable */

#define RGEPHY_BMSR_100TXFDX   0x4000  /* 100 base Tx full duplex capable */

#define RGEPHY_BMSR_100TXHDX   0x2000  /* 100 base Tx half duplex capable */

#define RGEPHY_BMSR_10TFDX 0x1000  /* 10 base T full duplex capable */

#define RGEPHY_BMSR_10THDX 0x0800  /* 10 base T half duplex capable */

#define RGEPHY_BMSR_100T2FDX   0x0400  /* 100 base T2 full duplex capable */

#define RGEPHY_BMSR_100T2HDX   0x0200  /* 100 base T2 half duplex capable */

#define RGEPHY_BMSR_EXTSTS 0x0100  /* Extended status present */

#define RGEPHY_BMSR_PRESUB 0x0040  /* Preamble surpression */

#define RGEPHY_BMSR_ACOMP  0x0020  /* Autoneg complete */

#define RGEPHY_BMSR_RFAULT 0x0010  /* Remote fault condition occured */

#define RGEPHY_BMSR_ANEG   0x0008  /* Autoneg capable */

#define RGEPHY_BMSR_LINK   0x0004  /* Link status */

#define RGEPHY_BMSR_JABBER 0x0002  /* Jabber detected */

#define RGEPHY_BMSR_EXT        0x0001  /* Extended capability */

#define RGEPHY_MII_ANAR        0x04

#define RGEPHY_ANAR_NP     0x8000  /* Next page */

#define RGEPHY_ANAR_RF     0x2000  /* Remote fault */

#define RGEPHY_ANAR_ASP        0x0800  /* Asymmetric Pause */

#define RGEPHY_ANAR_PC     0x0400  /* Pause capable */

#define RGEPHY_ANAR_T4     0x0200  /* local device supports 100bT4 */

#define RGEPHY_ANAR_TX_FD  0x0100  /* local device supports 100bTx FD */

#define RGEPHY_ANAR_TX     0x0080  /* local device supports 100bTx */

#define RGEPHY_ANAR_10_FD  0x0040  /* local device supports 10bT FD */

#define RGEPHY_ANAR_10     0x0020  /* local device supports 10bT */

#define RGEPHY_ANAR_SEL        0x001F  /* selector field, 00001=Ethernet */

#define RGEPHY_MII_ANLPAR  0x05

#define RGEPHY_ANLPAR_NP   0x8000  /* Next page */

#define RGEPHY_ANLPAR_RF   0x2000  /* Remote fault */

#define RGEPHY_ANLPAR_ASP  0x0800  /* Asymmetric Pause */

#define RGEPHY_ANLPAR_PC   0x0400  /* Pause capable */

#define RGEPHY_ANLPAR_T4   0x0200  /* link partner supports 100bT4 */

#define RGEPHY_ANLPAR_TX_FD    0x0100  /* link partner supports 100bTx FD */

#define RGEPHY_ANLPAR_TX   0x0080  /* link partner supports 100bTx */

#define RGEPHY_ANLPAR_10_FD    0x0040  /* link partner supports 10bT FD */

#define RGEPHY_ANLPAR_10   0x0020  /* link partner supports 10bT */

#define RGEPHY_ANLPAR_SEL  0x001F  /* selector field, 00001=Ethernet */

#define RGEPHY_SEL_TYPE        0x0001  /* ethernet */

#define RGEPHY_MII_ANER        0x06

#define RGEPHY_ANER_PDF        0x0010  /* Parallel detection fault */

#define RGEPHY_ANER_LPNP   0x0008  /* Link partner can next page */

#define RGEPHY_ANER_NP     0x0004  /* Local PHY can next page */

#define RGEPHY_ANER_RX     0x0002  /* Next page received */

#define RGEPHY_ANER_LPAN   0x0001  /* Link partner autoneg capable */

#define RGEPHY_MII_NEXTP   0x07    /* Next page */

#define RGEPHY_MII_NEXTP_LP    0x08    /* Next page of link partner */

#define RGEPHY_MII_1000CTL 0x09    /* 1000baseT control */

#define RGEPHY_1000CTL_TST 0xE000  /* test modes */

#define RGEPHY_1000CTL_MSE 0x1000  /* Master/Slave manual enable */

#define RGEPHY_1000CTL_MSC 0x0800  /* Master/Slave select */

#define RGEPHY_1000CTL_RD  0x0400  /* Repeater/DTE */

#define RGEPHY_1000CTL_AFD 0x0200  /* Advertise full duplex */

#define RGEPHY_1000CTL_AHD 0x0100  /* Advertise half duplex */

#define RGEPHY_TEST_TX_JITTER          0x2000

#define RGEPHY_TEST_TX_JITTER_MASTER_MODE  0x4000

#define RGEPHY_TEST_TX_JITTER_SLAVE_MODE   0x6000

#define RGEPHY_TEST_TX_DISTORTION      0x8000

#define RGEPHY_MII_1000STS 0x0A    /* 1000baseT status */

#define RGEPHY_1000STS_MSF 0x8000  /* Master/slave fault */

#define RGEPHY_1000STS_MSR 0x4000  /* Master/slave result */

#define RGEPHY_1000STS_LRS 0x2000  /* Local receiver status */

#define RGEPHY_1000STS_RRS 0x1000  /* Remote receiver status */

#define RGEPHY_1000STS_LPFD    0x0800  /* Link partner can FD */

#define RGEPHY_1000STS_LPHD    0x0400  /* Link partner can HD */

#define RGEPHY_1000STS_IEC 0x00FF  /* Idle error count */

#define RGEPHY_MII_EXTSTS  0x0F    /* Extended status */

#define RGEPHY_EXTSTS_X_FD_CAP 0x8000  /* 1000base-X FD capable */

#define RGEPHY_EXTSTS_X_HD_CAP 0x4000  /* 1000base-X HD capable */

#define RGEPHY_EXTSTS_T_FD_CAP 0x2000  /* 1000base-T FD capable */

#define RGEPHY_EXTSTS_T_HD_CAP 0x1000  /* 1000base-T HD capable */

#endif /* _DEV_RGEPHY_MIIREG_H_ */