diff --git a/sys/boot/pc32/libi386/Makefile b/sys/boot/pc32/libi386/Makefile index 8e58b5e..60992a5 100644 --- a/sys/boot/pc32/libi386/Makefile +++ b/sys/boot/pc32/libi386/Makefile @@ -11,7 +11,7 @@ SRCS= biosacpi.c bioscd.c biosdisk.c biosmem.c biospnp.c \ comconsole.c devicename.c elf32_freebsd.c \ elf64_freebsd.c gatea20.c \ i386_copy.c i386_module.c nullconsole.c pxe.c pxetramp.s \ - time.c vidconsole.c x86_64_tramp.S + smbios.c time.c vidconsole.c x86_64_tramp.S CFLAGS+= -ffreestanding BOOT_COMCONSOLE_PORT?= 0x3f8 @@ -25,6 +25,15 @@ CFLAGS+= -DCOMSPEED=${BOOT_COMCONSOLE_SPEED} CFLAGS+= -DDISK_DEBUG .endif +.if !defined(BOOT_HIDE_SERIAL_NUMBERS) +# Export serial numbers, UUID, and asset tag from loader. +CFLAGS+= -DSMBIOS_SERIAL_NUMBERS +.if defined(BOOT_LITTLE_ENDIAN_UUID) +# Use little-endian UUID format as defined in SMBIOS 2.6. +CFLAGS+= -DSMBIOS_LITTLE_ENDIAN_UUID +.endif +.endif + # Include simple terminal emulation (cons25-compatible) CFLAGS+= -DTERM_EMU diff --git a/sys/boot/pc32/libi386/libi386.h b/sys/boot/pc32/libi386/libi386.h index 03f246a..6736587 100644 --- a/sys/boot/pc32/libi386/libi386.h +++ b/sys/boot/pc32/libi386/libi386.h @@ -96,6 +96,8 @@ extern vm_offset_t memtop; void biosacpi_detect(void); +void smbios_detect(void); + void gateA20(void); int i386_autoload(void); diff --git a/sys/boot/pc32/libi386/smbios.c b/sys/boot/pc32/libi386/smbios.c new file mode 100644 index 0000000..d4ad96d --- /dev/null +++ b/sys/boot/pc32/libi386/smbios.c @@ -0,0 +1,349 @@ +/*- + * Copyright (c) 2005-2009 Jung-uk Kim + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * __FBSDID("$FreeBSD: stable/9/sys/boot/i386/libi386/smbios.c 190814 2009-04-07 17:58:15Z jkim $"); + */ + +#include + +#include +#include +#include +#include + +#include "btxv86.h" +#include "libi386.h" + +/* + * Detect SMBIOS and export information about the SMBIOS into the + * environment. + * + * System Management BIOS Reference Specification, v2.6 Final + * http://www.dmtf.org/standards/published_documents/DSP0134_2.6.0.pdf + */ + +/* + * 2.1.1 SMBIOS Structure Table Entry Point + * + * "On non-EFI systems, the SMBIOS Entry Point structure, described below, can + * be located by application software by searching for the anchor-string on + * paragraph (16-byte) boundaries within the physical memory address range + * 000F0000h to 000FFFFFh. This entry point encapsulates an intermediate anchor + * string that is used by some existing DMI browsers." + */ +#define SMBIOS_START 0xf0000 +#define SMBIOS_LENGTH 0x10000 +#define SMBIOS_STEP 0x10 +#define SMBIOS_SIG "_SM_" +#define SMBIOS_DMI_SIG "_DMI_" + +#define SMBIOS_GET8(base, off) (*(uint8_t *)((base) + (off))) +#define SMBIOS_GET16(base, off) (*(uint16_t *)((base) + (off))) +#define SMBIOS_GET32(base, off) (*(uint32_t *)((base) + (off))) + +#define SMBIOS_GETLEN(base) SMBIOS_GET8(base, 0x01) +#define SMBIOS_GETSTR(base) ((base) + SMBIOS_GETLEN(base)) + +static uint32_t smbios_enabled_memory = 0; +static uint32_t smbios_old_enabled_memory = 0; +static uint8_t smbios_enabled_sockets = 0; +static uint8_t smbios_populated_sockets = 0; + +static uint8_t +smbios_checksum(const caddr_t addr, const uint8_t len) +{ + uint8_t sum; + int i; + + for (sum = 0, i = 0; i < len; i++) + sum += SMBIOS_GET8(addr, i); + return (sum); +} + +static caddr_t +smbios_sigsearch(const caddr_t addr, const uint32_t len) +{ + caddr_t cp; + + /* Search on 16-byte boundaries. */ + for (cp = addr; cp < addr + len; cp += SMBIOS_STEP) + if (strncmp(cp, SMBIOS_SIG, 4) == 0 && + smbios_checksum(cp, SMBIOS_GET8(cp, 0x05)) == 0 && + strncmp(cp + 0x10, SMBIOS_DMI_SIG, 5) == 0 && + smbios_checksum(cp + 0x10, 0x0f) == 0) + return (cp); + return (NULL); +} + +static void +smbios_setenv(const char *name, caddr_t addr, const int offset) +{ + caddr_t cp; + int i, idx; + + idx = SMBIOS_GET8(addr, offset); + if (idx != 0) { + cp = SMBIOS_GETSTR(addr); + for (i = 1; i < idx; i++) + cp += strlen(cp) + 1; + setenv(name, cp, 1); + } +} + +#ifdef SMBIOS_SERIAL_NUMBERS + +#define UUID_SIZE 16 +#define UUID_TYPE uint32_t +#define UUID_STEP sizeof(UUID_TYPE) +#define UUID_ALL_BITS (UUID_SIZE / UUID_STEP) +#define UUID_GET(base, off) (*(UUID_TYPE *)((base) + (off))) + +static void +smbios_setuuid(const char *name, const caddr_t addr, const int ver) +{ + char uuid[37]; + int i, ones, zeros; + UUID_TYPE n; + uint32_t f1; + uint16_t f2, f3; + + for (i = 0, ones = 0, zeros = 0; i < UUID_SIZE; i += UUID_STEP) { + n = UUID_GET(addr, i) + 1; + if (zeros == 0 && n == 0) + ones++; + else if (ones == 0 && n == 1) + zeros++; + else + break; + } + + if (ones != UUID_ALL_BITS && zeros != UUID_ALL_BITS) { + /* + * 3.3.2.1 System UUID + * + * "Although RFC 4122 recommends network byte order for all + * fields, the PC industry (including the ACPI, UEFI, and + * Microsoft specifications) has consistently used + * little-endian byte encoding for the first three fields: + * time_low, time_mid, time_hi_and_version. The same encoding, + * also known as wire format, should also be used for the + * SMBIOS representation of the UUID." + * + * Note: We use network byte order for backward compatibility + * unless SMBIOS version is 2.6+ or little-endian is forced. + */ +#ifndef SMBIOS_LITTLE_ENDIAN_UUID + if (ver < 0x0206) { + f1 = ntohl(SMBIOS_GET32(addr, 0)); + f2 = ntohs(SMBIOS_GET16(addr, 4)); + f3 = ntohs(SMBIOS_GET16(addr, 6)); + } else +#endif + { + f1 = le32toh(SMBIOS_GET32(addr, 0)); + f2 = le16toh(SMBIOS_GET16(addr, 4)); + f3 = le16toh(SMBIOS_GET16(addr, 6)); + } + sprintf(uuid, + "%08x-%04x-%04x-%02x%02x-%02x%02x%02x%02x%02x%02x", + f1, f2, f3, SMBIOS_GET8(addr, 8), SMBIOS_GET8(addr, 9), + SMBIOS_GET8(addr, 10), SMBIOS_GET8(addr, 11), + SMBIOS_GET8(addr, 12), SMBIOS_GET8(addr, 13), + SMBIOS_GET8(addr, 14), SMBIOS_GET8(addr, 15)); + setenv(name, uuid, 1); + } +} + +#undef UUID_SIZE +#undef UUID_TYPE +#undef UUID_STEP +#undef UUID_ALL_BITS +#undef UUID_GET + +#endif + +static caddr_t +smbios_parse_table(const caddr_t addr, const int ver) +{ + caddr_t cp; + int proc, size, osize, type; + + type = SMBIOS_GET8(addr, 0); /* 3.1.2 Structure Header Format */ + switch(type) { + case 0: /* 3.3.1 BIOS Information (Type 0) */ + smbios_setenv("smbios.bios.vendor", addr, 0x04); + smbios_setenv("smbios.bios.version", addr, 0x05); + smbios_setenv("smbios.bios.reldate", addr, 0x08); + break; + + case 1: /* 3.3.2 System Information (Type 1) */ + smbios_setenv("smbios.system.maker", addr, 0x04); + smbios_setenv("smbios.system.product", addr, 0x05); + smbios_setenv("smbios.system.version", addr, 0x06); +#ifdef SMBIOS_SERIAL_NUMBERS + smbios_setenv("smbios.system.serial", addr, 0x07); + smbios_setuuid("smbios.system.uuid", addr + 0x08, ver); +#endif + break; + + case 2: /* 3.3.3 Base Board (or Module) Information (Type 2) */ + smbios_setenv("smbios.planar.maker", addr, 0x04); + smbios_setenv("smbios.planar.product", addr, 0x05); + smbios_setenv("smbios.planar.version", addr, 0x06); +#ifdef SMBIOS_SERIAL_NUMBERS + smbios_setenv("smbios.planar.serial", addr, 0x07); +#endif + break; + + case 3: /* 3.3.4 System Enclosure or Chassis (Type 3) */ + smbios_setenv("smbios.chassis.maker", addr, 0x04); + smbios_setenv("smbios.chassis.version", addr, 0x06); +#ifdef SMBIOS_SERIAL_NUMBERS + smbios_setenv("smbios.chassis.serial", addr, 0x07); + smbios_setenv("smbios.chassis.tag", addr, 0x08); +#endif + break; + + case 4: /* 3.3.5 Processor Information (Type 4) */ + /* + * Offset 18h: Processor Status + * + * Bit 7 Reserved, must be 0 + * Bit 6 CPU Socket Populated + * 1 - CPU Socket Populated + * 0 - CPU Socket Unpopulated + * Bit 5:3 Reserved, must be zero + * Bit 2:0 CPU Status + * 0h - Unknown + * 1h - CPU Enabled + * 2h - CPU Disabled by User via BIOS Setup + * 3h - CPU Disabled by BIOS (POST Error) + * 4h - CPU is Idle, waiting to be enabled + * 5-6h - Reserved + * 7h - Other + */ + proc = SMBIOS_GET8(addr, 0x18); + if ((proc & 0x07) == 1) + smbios_enabled_sockets++; + if ((proc & 0x40) != 0) + smbios_populated_sockets++; + break; + + case 6: /* 3.3.7 Memory Module Information (Type 6, Obsolete) */ + /* + * Offset 0Ah: Enabled Size + * + * Bit 7 Bank connection + * 1 - Double-bank connection + * 0 - Single-bank connection + * Bit 6:0 Size (n), where 2**n is the size in MB + * 7Dh - Not determinable (Installed Size only) + * 7Eh - Module is installed, but no memory + * has been enabled + * 7Fh - Not installed + */ + osize = SMBIOS_GET8(addr, 0x0a) & 0x7f; + if (osize > 0 && osize < 22) + smbios_old_enabled_memory += 1 << (osize + 10); + break; + + case 17: /* 3.3.18 Memory Device (Type 17) */ + /* + * Offset 0Ch: Size + * + * Bit 15 Granularity + * 1 - Value is in kilobytes units + * 0 - Value is in megabytes units + * Bit 14:0 Size + */ + size = SMBIOS_GET16(addr, 0x0c); + if (size != 0 && size != 0xffff) + smbios_enabled_memory += (size & 0x8000) != 0 ? + (size & 0x7fff) : (size << 10); + break; + + default: /* skip other types */ + break; + } + + /* Find structure terminator. */ + cp = SMBIOS_GETSTR(addr); + while (SMBIOS_GET16(cp, 0) != 0) + cp++; + + return (cp + 2); +} + +void +smbios_detect(void) +{ + char buf[16]; + caddr_t addr, dmi, smbios; + size_t count, length; + uint32_t paddr; + int i, major, minor, ver; + + /* Search signatures and validate checksums. */ + smbios = smbios_sigsearch(PTOV(SMBIOS_START), SMBIOS_LENGTH); + if (smbios == NULL) + return; + + length = SMBIOS_GET16(smbios, 0x16); /* Structure Table Length */ + paddr = SMBIOS_GET32(smbios, 0x18); /* Structure Table Address */ + count = SMBIOS_GET16(smbios, 0x1c); /* No of SMBIOS Structures */ + ver = SMBIOS_GET8(smbios, 0x1e); /* SMBIOS BCD Revision */ + + if (ver != 0) { + major = ver >> 4; + minor = ver & 0x0f; + if (major > 9 || minor > 9) + ver = 0; + } + if (ver == 0) { + major = SMBIOS_GET8(smbios, 0x06); /* SMBIOS Major Version */ + minor = SMBIOS_GET8(smbios, 0x07); /* SMBIOS Minor Version */ + } + ver = (major << 8) | minor; + + addr = PTOV(paddr); + for (dmi = addr, i = 0; dmi < addr + length && i < count; i++) + dmi = smbios_parse_table(dmi, ver); + + sprintf(buf, "%d.%d", major, minor); + setenv("smbios.version", buf, 1); + if (smbios_enabled_memory > 0 || smbios_old_enabled_memory > 0) { + sprintf(buf, "%u", smbios_enabled_memory > 0 ? + smbios_enabled_memory : smbios_old_enabled_memory); + setenv("smbios.memory.enabled", buf, 1); + } + if (smbios_enabled_sockets > 0) { + sprintf(buf, "%u", smbios_enabled_sockets); + setenv("smbios.socket.enabled", buf, 1); + } + if (smbios_populated_sockets > 0) { + sprintf(buf, "%u", smbios_populated_sockets); + setenv("smbios.socket.populated", buf, 1); + } +} diff --git a/sys/boot/pc32/loader/main.c b/sys/boot/pc32/loader/main.c index 7c61208..805b126 100644 --- a/sys/boot/pc32/loader/main.c +++ b/sys/boot/pc32/loader/main.c @@ -240,6 +240,9 @@ main(void) /* detect ACPI for future reference */ biosacpi_detect(); + /* detect SMBIOS for future reference */ + smbios_detect(); + /* enable EHCI */ setenv("ehci_load", "YES", 1); diff --git a/sys/cpu/i386/include/cpufunc.h b/sys/cpu/i386/include/cpufunc.h index d51d474..b4ea547 100644 --- a/sys/cpu/i386/include/cpufunc.h +++ b/sys/cpu/i386/include/cpufunc.h @@ -113,6 +113,13 @@ bsrl(u_int mask) return (result); } +static __inline void +clflush(u_long addr) +{ + + __asm __volatile("clflush %0" : : "m" (*(char *)addr)); +} + /* * Test and set the specified bit (1 << bit) in the integer. The * previous value of the bit is returned (0 or 1). diff --git a/sys/cpu/x86_64/include/cpufunc.h b/sys/cpu/x86_64/include/cpufunc.h index 2e2af76..c24673a 100644 --- a/sys/cpu/x86_64/include/cpufunc.h +++ b/sys/cpu/x86_64/include/cpufunc.h @@ -125,6 +125,13 @@ bsrq(u_long mask) } static __inline void +clflush(u_long addr) +{ + + __asm __volatile("clflush %0" : : "m" (*(char *)addr)); +} + +static __inline void do_cpuid(u_int ax, u_int *p) { __asm __volatile("cpuid" diff --git a/sys/kern/subr_param.c b/sys/kern/subr_param.c index f7a062f..7233e0d 100644 --- a/sys/kern/subr_param.c +++ b/sys/kern/subr_param.c @@ -46,6 +46,7 @@ #include #include #include +#include #include #include #include @@ -56,6 +57,13 @@ #ifndef HZ #define HZ 100 +# ifndef HZ_VM +# define HZ_VM 100 +# endif +#else +# ifndef HZ_VM +# define HZ_VM HZ +# endif #endif #define NPROC (20 + 16 * maxusers) #ifndef NBUF @@ -68,6 +76,8 @@ #define MAXPOSIXLOCKSPERUID (maxusers * 64) /* Should be a safe value */ #endif +static int sysctl_kern_vm_guest(SYSCTL_HANDLER_ARGS); + int hz; int stathz; int profhz; @@ -88,6 +98,7 @@ int nbuf; int nswbuf; long maxswzone; /* max swmeta KVA storage */ long maxbcache; /* max buffer cache KVA storage */ +int vm_guest; /* Running as virtual machine guest? */ u_quad_t maxtsiz; /* max text size */ u_quad_t dfldsiz; /* initial data size limit */ u_quad_t maxdsiz; /* max data size */ @@ -95,6 +106,10 @@ u_quad_t dflssiz; /* initial stack size limit */ u_quad_t maxssiz; /* max stack size */ u_quad_t sgrowsiz; /* amount to grow stack */ +SYSCTL_PROC(_kern, OID_AUTO, vm_guest, CTLFLAG_RD | CTLTYPE_STRING, + NULL, 0, sysctl_kern_vm_guest, "A", + "Virtual machine guest detected? (none|generic|xen)"); + /* * These have to be allocated somewhere; allocating * them here forces loader errors if this file is omitted @@ -103,13 +118,80 @@ u_quad_t sgrowsiz; /* amount to grow stack */ struct buf *swbuf; /* + * The elements of this array are ordered based upon the values of the + * corresponding enum VM_GUEST members. + */ +static const char *const vm_guest_sysctl_names[] = { + "none", + "generic", + "xen", + NULL +}; + +#ifndef XEN +static const char *const vm_bnames[] = { + "QEMU", /* QEMU */ + "Plex86", /* Plex86 */ + "Bochs", /* Bochs */ + "Xen", /* Xen */ + NULL +}; + +static const char *const vm_pnames[] = { + "VMware Virtual Platform", /* VMWare VM */ + "Virtual Machine", /* Microsoft VirtualPC */ + "VirtualBox", /* Sun xVM VirtualBox */ + "Parallels Virtual Platform", /* Parallels VM */ + NULL +}; + + +/* + * Detect known Virtual Machine hosts by inspecting the emulated BIOS. + */ +static enum VM_GUEST +detect_virtual(void) +{ + char *sysenv; + int i; + + sysenv = kgetenv("smbios.bios.vendor"); + if (sysenv != NULL) { + for (i = 0; vm_bnames[i] != NULL; i++) + if (strcmp(sysenv, vm_bnames[i]) == 0) { + kfreeenv(sysenv); + return (VM_GUEST_VM); + } + kfreeenv(sysenv); + } + sysenv = kgetenv("smbios.system.product"); + if (sysenv != NULL) { + for (i = 0; vm_pnames[i] != NULL; i++) + if (strcmp(sysenv, vm_pnames[i]) == 0) { + kfreeenv(sysenv); + return (VM_GUEST_VM); + } + kfreeenv(sysenv); + } + return (VM_GUEST_NO); +} +#endif + +/* * Boot time overrides that are not scaled against main memory */ void init_param1(void) { - hz = HZ; +#ifndef XEN + vm_guest = detect_virtual(); +#else + vm_guest = VM_GUEST_XEN; +#endif + hz = -1; TUNABLE_INT_FETCH("kern.hz", &hz); + if (hz == -1) + hz = vm_guest > VM_GUEST_NO ? HZ_VM : HZ; stathz = hz * 128 / 100; profhz = stathz; ustick = 1000000 / hz; @@ -227,3 +309,12 @@ init_param2(int physpages) TUNABLE_INT_FETCH("kern.ncallout", &ncallout); } +/* + * Sysctl stringiying handler for kern.vm_guest. + */ +static int +sysctl_kern_vm_guest(SYSCTL_HANDLER_ARGS) +{ + return (SYSCTL_OUT(req, vm_guest_sysctl_names[vm_guest], + strlen(vm_guest_sysctl_names[vm_guest]))); +} diff --git a/sys/platform/pc32/i386/initcpu.c b/sys/platform/pc32/i386/initcpu.c index 8e7df82..cc81a64 100644 --- a/sys/platform/pc32/i386/initcpu.c +++ b/sys/platform/pc32/i386/initcpu.c @@ -41,6 +41,13 @@ #include #include +#include +#include + +#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) +#define CPU_ENABLE_SSE +#endif + void initializecpu(void); #if defined(I586_CPU) && defined(CPU_WT_ALLOC) void enable_K5_wt_alloc(void); @@ -68,6 +75,12 @@ static void init_mendocino(void); static int hw_instruction_sse; SYSCTL_INT(_hw, OID_AUTO, instruction_sse, CTLFLAG_RD, &hw_instruction_sse, 0, "SIMD/MMX2 instructions available in CPU"); +/* + * -1: automatic (default) + * 0: keep enable CLFLUSH + * 1: force disable CLFLUSH + */ +static int hw_clflush_disable = -1; /* Must *NOT* be BSS or locore will bzero these after setting them */ int cpu = 0; /* Are we 386, 386sx, 486, etc? */ @@ -84,15 +97,24 @@ u_int cpu_procinfo = 0; /* HyperThreading Info / Brand Index / CLFUSH */ u_int cpu_procinfo2 = 0; /* Multicore info */ char cpu_vendor[20] = ""; /* CPU Origin code */ u_int cpu_vendor_id = 0; /* CPU vendor ID */ +u_int cpu_clflush_line_size = 32; SYSCTL_UINT(_hw, OID_AUTO, via_feature_rng, CTLFLAG_RD, &via_feature_rng, 0, "VIA C3/C7 RNG feature available in CPU"); SYSCTL_UINT(_hw, OID_AUTO, via_feature_xcrypt, CTLFLAG_RD, &via_feature_xcrypt, 0, "VIA C3/C7 xcrypt feature available in CPU"); +#if 0 #ifndef CPU_DISABLE_SSE u_int cpu_fxsr; /* SSE enabled */ #endif +#endif +#ifdef CPU_ENABLE_SSE +u_int cpu_fxsr; /* SSE enabled */ +#if 0 +u_int cpu_mxcsr_mask; /* valid bits in mxcsr */ +#endif +#endif #ifdef I486_CPU /* @@ -588,12 +610,20 @@ init_via(void) void enable_sse(void) { +#if 0 #ifndef CPU_DISABLE_SSE if ((cpu_feature & CPUID_SSE) && (cpu_feature & CPUID_FXSR)) { load_cr4(rcr4() | CR4_FXSR | CR4_XMM); cpu_fxsr = hw_instruction_sse = 1; } #endif +#endif +#if defined(CPU_ENABLE_SSE) + if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) { + load_cr4(rcr4() | CR4_FXSR | CR4_XMM); + cpu_fxsr = hw_instruction_sse = 1; + } +#endif } #ifdef I686_CPU @@ -685,6 +715,29 @@ initializecpu(void) break; } enable_sse(); + + /* + * CPUID with %eax = 1, %ebx returns + * Bits 15-8: CLFLUSH line size + * (Value * 8 = cache line size in bytes) + */ + if ((cpu_feature & CPUID_CLFSH) != 0) + cpu_clflush_line_size = ((cpu_procinfo >> 8) & 0xff) * 8; + /* + * XXXKIB: (temporary) hack to work around traps generated + * when CLFLUSHing APIC register window under virtualization + * environments. These environments tend to disable the + * CPUID_SS feature even though the native CPU supports it. + */ + TUNABLE_INT_FETCH("hw.clflush_disable", &hw_clflush_disable); + if (vm_guest != VM_GUEST_NO && hw_clflush_disable == -1) + cpu_feature &= ~CPUID_CLFSH; + /* + * Allow to disable CLFLUSH feature manually by + * hw.clflush_disable tunable. + */ + if (hw_clflush_disable == 1) + cpu_feature &= ~CPUID_CLFSH; } #if defined(I586_CPU) && defined(CPU_WT_ALLOC) diff --git a/sys/platform/pc32/include/md_var.h b/sys/platform/pc32/include/md_var.h index 0e78241..2366dca 100644 --- a/sys/platform/pc32/include/md_var.h +++ b/sys/platform/pc32/include/md_var.h @@ -61,6 +61,7 @@ extern u_int amd_feature; extern u_int amd_feature2; extern u_int via_feature_rng; extern u_int via_feature_xcrypt; +extern u_int cpu_clflush_line_size; extern u_int cpu_fxsr; extern u_int cpu_high; extern u_int cpu_id; diff --git a/sys/platform/pc64/include/md_var.h b/sys/platform/pc64/include/md_var.h index cffe7c9..1f8c88a 100644 --- a/sys/platform/pc64/include/md_var.h +++ b/sys/platform/pc64/include/md_var.h @@ -49,6 +49,7 @@ extern u_int via_feature_rng; extern u_int via_feature_xcrypt; extern u_int amd_feature; extern u_int amd_feature2; +extern u_int cpu_clflush_line_size; extern u_int cpu_fxsr; extern u_int cpu_high; extern u_int cpu_id; @@ -101,5 +102,9 @@ void syscall2 (struct trapframe *); void minidumpsys(struct dumperinfo *); void dump_add_page(vm_paddr_t); void dump_drop_page(vm_paddr_t); +#if 0 +void initializecpu(void); +#endif +void initializecpucache(void); #endif /* !_MACHINE_MD_VAR_H_ */ diff --git a/sys/platform/pc64/x86_64/initcpu.c b/sys/platform/pc64/x86_64/initcpu.c index 165173a..e737b86 100644 --- a/sys/platform/pc64/x86_64/initcpu.c +++ b/sys/platform/pc64/x86_64/initcpu.c @@ -46,6 +46,12 @@ static int hw_instruction_sse; SYSCTL_INT(_hw, OID_AUTO, instruction_sse, CTLFLAG_RD, &hw_instruction_sse, 0, "SIMD/MMX2 instructions available in CPU"); +/* + * -1: automatic (default) + * 0: keep enable CLFLUSH + * 1: force disable CLFLUSH + */ +static int hw_clflush_disable = -1; int cpu; /* Are we 386, 386sx, 486, etc? */ u_int cpu_feature; /* Feature flags */ @@ -63,6 +69,7 @@ char cpu_vendor[20]; /* CPU Origin code */ u_int cpu_vendor_id; /* CPU vendor ID */ u_int cpu_fxsr; /* SSE enabled */ u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */ +u_int cpu_clflush_line_size = 32; SYSCTL_UINT(_hw, OID_AUTO, via_feature_rng, CTLFLAG_RD, &via_feature_rng, 0, "VIA C3/C7 RNG feature available in CPU"); @@ -180,3 +187,31 @@ initializecpu(void) CPUID_TO_MODEL(cpu_id) >= 0xf) init_via(); } + +void +initializecpucache(void) +{ + + /* + * CPUID with %eax = 1, %ebx returns + * Bits 15-8: CLFLUSH line size + * (Value * 8 = cache line size in bytes) + */ + if ((cpu_feature & CPUID_CLFSH) != 0) + cpu_clflush_line_size = ((cpu_procinfo >> 8) & 0xff) * 8; + /* + * XXXKIB: (temporary) hack to work around traps generated + * when CLFLUSHing APIC register window under virtualization + * environments. These environments tend to disable the + * CPUID_SS feature even though the native CPU supports it. + */ + TUNABLE_INT_FETCH("hw.clflush_disable", &hw_clflush_disable); + if (vm_guest != VM_GUEST_NO && hw_clflush_disable == -1) + cpu_feature &= ~CPUID_CLFSH; + /* + * Allow to disable CLFLUSH feature manually by + * hw.clflush_disable tunable. + */ + if (hw_clflush_disable == 1) + cpu_feature &= ~CPUID_CLFSH; +} diff --git a/sys/platform/pc64/x86_64/machdep.c b/sys/platform/pc64/x86_64/machdep.c index 80f7e93..ea2965e 100644 --- a/sys/platform/pc64/x86_64/machdep.c +++ b/sys/platform/pc64/x86_64/machdep.c @@ -1905,6 +1905,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree) #endif identify_cpu(); /* Final stage of CPU initialization */ initializecpu(); /* Initialize CPU registers */ + initializecpucache(); TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */ TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable); diff --git a/sys/sys/systm.h b/sys/sys/systm.h index b153f57..add712e 100644 --- a/sys/sys/systm.h +++ b/sys/sys/systm.h @@ -85,6 +85,15 @@ extern int bootverbose; /* nonzero to print verbose messages */ extern int maxusers; /* system tune hint */ +extern int vm_guest; /* Running as virtual machine guest? */ + +/* + * Detected virtual machine guest types. The intention is to expand + * and/or add to the VM_GUEST_VM type if specific VM functionality is + * ever implemented (e.g. vendor-specific paravirtualization features). + */ +enum VM_GUEST { VM_GUEST_NO = 0, VM_GUEST_VM, VM_GUEST_XEN }; + extern int ncpus; /* total number of cpus (real, hyper, virtual)*/ extern int ncpus2; /* ncpus rounded down to power of 2 */ extern int ncpus2_shift; /* log base 2 of ncpus2 */