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/*
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* Copyright (c) 2004 Martin V\xe9giard.
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* Copyright (c) 2004-2005 Bruno Ducrot
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* Copyright (c) 2004 FUKUDA Nobuhiko <nfukuda@spa.is.uec.ac.jp>
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* Copyright (c) 2004, 2006 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Juan Romero Pardines and Martin Vegiard.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* AMD POWERNOW K8 driver */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <bus/isa/isa.h>
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#include <machine/cpu.h>
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#include <machine/pmap.h>
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#include <machine/pc/bios.h>
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#include <machine/cpufunc.h>
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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#define PN8_STA_MFID(x) (((x) >> 16) & 0x3f)
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#define PN8_STA_MVID(x) (((x) >> 48) & 0x1f)
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#define PN8_STA_SFID(x) (((x) >> 8) & 0x3f)
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/*
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* MSRs and bits used by PowerNow! technology
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*/
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#define MSR_AMDK7_FIDVID_CTL 0xc0010041
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#define MSR_AMDK7_FIDVID_STATUS 0xc0010042
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#define AMD_PN_FID_VID 0x06
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#define BIOS_START 0xe0000
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#define BIOS_LEN 0x20000
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#define BIOS_STEP 16
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#define PN8_PSB_VERSION 0x14
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#define PN8_PSB_TO_RVO(x) ((x) & 0x03)
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#define PN8_PSB_TO_IRT(x) (((x) >> 2) & 0x03)
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#define PN8_PSB_TO_MVS(x) (((x) >> 4) & 0x03)
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#define PN8_PSB_TO_BATT(x) (((x) >> 6) & 0x03)
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/* Bitfields used by K8 */
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#define PN8_CTR_FID(x) ((x) & 0x3f)
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#define PN8_CTR_VID(x) (((x) & 0x1f) << 8)
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#define PN8_CTR_PENDING(x) (((x) & 1) << 32)
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#define PN8_STA_CFID(x) ((x) & 0x3f)
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#define PN8_STA_SFID(x) (((x) >> 8) & 0x3f)
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#define PN8_STA_MFID(x) (((x) >> 16) & 0x3f)
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#define PN8_STA_PENDING(x) (((x) >> 31) & 0x01)
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#define PN8_STA_CVID(x) (((x) >> 32) & 0x1f)
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#define PN8_STA_SVID(x) (((x) >> 40) & 0x1f)
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#define PN8_STA_MVID(x) (((x) >> 48) & 0x1f)
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#define PN8_PLL_LOCK(x) ((x) * 1000/5)
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#define WRITE_FIDVID(fid, vid, ctrl) \
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wrmsr(MSR_AMDK7_FIDVID_CTL, \
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(((ctrl) << 32) | (1ULL << 16) | ((vid) << 8) | (fid)))
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#define COUNT_OFF_IRT(irt) DELAY(10 * (1 << (irt)))
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#define COUNT_OFF_VST(vst) DELAY(20 * (vst))
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#define FID_TO_VCO_FID(fid) \
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(((fid) < 8) ? (8 + ((fid) << 1)) : (fid))
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#define READ_PENDING_WAIT(status) \
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do { \
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(status) = rdmsr(MSR_AMDK7_FIDVID_STATUS); \
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} while (PN8_STA_PENDING(status))
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#define abs(x) ( x < 0 ? -x : x )
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#define POWERNOW_MAX_STATES 16
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struct k8pnow_state {
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int freq;
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uint8_t fid;
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uint8_t vid;
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};
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struct k8pnow_cpu_state {
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struct k8pnow_state state_table[POWERNOW_MAX_STATES];
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unsigned int n_states;
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unsigned int sgtc;
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unsigned int vst;
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unsigned int mvs;
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unsigned int pll;
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unsigned int rvo;
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unsigned int irt;
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int low;
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};
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struct psb_s {
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char signature[10]; /* AMDK7PNOW! */
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uint8_t version;
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uint8_t flags;
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uint16_t ttime; /* Min Settling time */
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uint8_t reserved;
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uint8_t n_pst;
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};
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struct pst_s {
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uint32_t cpuid;
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uint8_t pll;
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uint8_t fid;
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uint8_t vid;
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uint8_t n_states;
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};
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static struct k8pnow_cpu_state *k8pnow_current_state = NULL;
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int cpuspeed;
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int
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k8pnow_states(struct k8pnow_cpu_state *cstate, uint32_t cpusig,
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unsigned int fid, unsigned int vid);
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int
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k8pnow_decode_pst(struct k8pnow_cpu_state *cstate, uint8_t *p);
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/*
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* Given a set of pair of fid/vid, and number of performance states,
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* compute state_table via an insertion sort.
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*/
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int
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k8pnow_decode_pst(struct k8pnow_cpu_state *cstate, uint8_t *p)
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{
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int i, j, n;
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struct k8pnow_state state;
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for (n = 0, i = 0; i < cstate->n_states; i++) {
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state.fid = *p++;
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state.vid = *p++;
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/*
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* The minimum supported frequency per the data sheet is 800MHz
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* The maximum supported frequency is 5000MHz.
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*/
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state.freq = 800 + state.fid * 100;
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j = n;
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while (j > 0 && cstate->state_table[j - 1].freq > state.freq) {
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memcpy(&cstate->state_table[j],
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&cstate->state_table[j - 1],
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sizeof(struct k8pnow_state));
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--j;
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}
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memcpy(&cstate->state_table[j], &state,
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sizeof(struct k8pnow_state));
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n++;
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}
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return 1;
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}
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int
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k8pnow_states(struct k8pnow_cpu_state *cstate, uint32_t cpusig,
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unsigned int fid, unsigned int vid)
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{
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struct psb_s *psb;
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struct pst_s *pst;
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uint8_t *p;
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int i;
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for (p = (u_int8_t *)BIOS_PADDRTOVADDR(BIOS_START);
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p < (u_int8_t *)BIOS_PADDRTOVADDR(BIOS_START + BIOS_LEN); p +=
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BIOS_STEP) {
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if (memcmp(p, "AMDK7PNOW!", 10) == 0) {
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kprintf("K7PNOW label found\n");
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psb = (struct psb_s *)p;
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if (psb->version != PN8_PSB_VERSION)
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return 0;
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cstate->vst = psb->ttime;
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cstate->rvo = PN8_PSB_TO_RVO(psb->reserved);
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cstate->irt = PN8_PSB_TO_IRT(psb->reserved);
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cstate->mvs = PN8_PSB_TO_MVS(psb->reserved);
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cstate->low = PN8_PSB_TO_BATT(psb->reserved);
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p+= sizeof(struct psb_s);
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for (i = 0; i < psb->n_pst; ++i) {
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pst = (struct pst_s *) p;
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cstate->pll = pst->pll;
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cstate->n_states = pst->n_states;
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if (cpusig == pst->cpuid &&
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pst->fid == fid && pst->vid == vid) {
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return (k8pnow_decode_pst(cstate,
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p+= sizeof (struct pst_s)));
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}
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p += sizeof(struct pst_s) + 2
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* cstate->n_states;
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}
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}
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}
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return 0;
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}
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static int
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k8_powernow_setperf(unsigned int freq)
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{
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unsigned int i;
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uint64_t status;
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uint32_t val;
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int cfid, cvid, fid = 0, vid = 0;
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int rvo;
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struct k8pnow_cpu_state *cstate;
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/*
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* We dont do a k8pnow_read_pending_wait here, need to ensure that the
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* change pending bit isn't stuck,
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*/
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status = rdmsr(MSR_AMDK7_FIDVID_STATUS);
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if (PN8_STA_PENDING(status))
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return 1;
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cfid = PN8_STA_CFID(status);
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cvid = PN8_STA_CVID(status);
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cstate = k8pnow_current_state;
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//kprintf("%s: cstate->n_states=%d\n", __func__, cstate->n_states);
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for (i = 0; i < cstate->n_states; i++) {
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if (cstate->state_table[i].freq >= freq) {
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//kprintf("%s: freq=%d\n", __func__, freq);
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fid = cstate->state_table[i].fid;
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vid = cstate->state_table[i].vid;
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//kprintf("%s: fid=%d vid=%d\n", __func__, fid, vid);
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break;
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}
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}
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if (fid == cfid && vid == cvid) {
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cpuspeed = freq;
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return 0;
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}
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/*
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* Phase 1: Raise core voltage to requested VID if frequency is
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* going up.
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*/
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while (cvid > vid) {
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val = cvid - (1 << cstate->mvs);
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WRITE_FIDVID(cfid, (val > 0) ? val : 0, 1ULL);
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READ_PENDING_WAIT(status);
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cvid = PN8_STA_CVID(status);
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COUNT_OFF_VST(cstate->vst);
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}
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/* ... then raise to voltage + RVO (if required) */
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for (rvo = cstate->rvo; rvo > 0 && cvid > 0; --rvo) {
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/* XXX It's not clear from spec if we have to do that
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* in 0.25 step or in MVS. Therefore do it as it's done
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* under Linux */
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WRITE_FIDVID(cfid, cvid - 1, 1ULL);
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READ_PENDING_WAIT(status);
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cvid = PN8_STA_CVID(status);
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COUNT_OFF_VST(cstate->vst);
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}
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/* Phase 2: change to requested core frequency */
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if (cfid != fid) {
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uint32_t vco_fid, vco_cfid;
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vco_fid = FID_TO_VCO_FID(fid);
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vco_cfid = FID_TO_VCO_FID(cfid);
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while (abs(vco_fid - vco_cfid) > 2) {
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if (fid > cfid) {
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if (cfid > 6)
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val = cfid + 2;
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else
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val = FID_TO_VCO_FID(cfid) + 2;
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} else
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val = cfid - 2;
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WRITE_FIDVID(val, cvid, (uint64_t)cstate->pll * 1000 / 5);
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READ_PENDING_WAIT(status);
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cfid = PN8_STA_CFID(status);
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COUNT_OFF_IRT(cstate->irt);
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vco_cfid = FID_TO_VCO_FID(cfid);
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}
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WRITE_FIDVID(fid, cvid, (uint64_t) cstate->pll * 1000 / 5);
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READ_PENDING_WAIT(status);
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cfid = PN8_STA_CFID(status);
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COUNT_OFF_IRT(cstate->irt);
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}
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/* Phase 3: change to requested voltage */
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if (cvid != vid) {
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WRITE_FIDVID(cfid, vid, 1ULL);
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READ_PENDING_WAIT(status);
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cvid = PN8_STA_CVID(status);
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COUNT_OFF_VST(cstate->vst);
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}
|
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if (cfid == fid || cvid == vid)
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cpuspeed = cstate->state_table[i].freq;
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return 0;
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}
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static int
|
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powernow_sysctl_helper(SYSCTL_HANDLER_ARGS)
|
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{
|
|
int fq, err = 0;
|
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int i;
|
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struct k8pnow_cpu_state *cstate;
|
|
struct k8pnow_state *state;
|
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cstate = k8pnow_current_state;
|
|
if (req->newptr != NULL) {
|
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err = SYSCTL_IN(req, &fq, sizeof(fq));
|
|
if (err)
|
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return err;
|
|
if (fq != cpuspeed) {
|
|
for (i = cstate->n_states; i > 0; i--) {
|
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state = &cstate->state_table[i-1];
|
|
if(fq == state->freq) {
|
|
k8_powernow_setperf(fq);
|
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break;
|
|
}
|
|
}
|
|
}
|
|
} else {
|
|
err = SYSCTL_OUT(req, &cpuspeed, sizeof(cpuspeed));
|
|
}
|
|
return err;
|
|
}
|
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|
|
static struct sysctl_ctx_list machdep_powernow_ctx;
|
|
static char freqs_available[80];
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|
|
|
static int
|
|
powernow_init(void)
|
|
{
|
|
uint64_t status;
|
|
size_t len, freq_len;
|
|
uint32_t maxfid, maxvid, i;
|
|
struct k8pnow_cpu_state *cstate;
|
|
struct k8pnow_state *state;
|
|
const char *techname;
|
|
u_int32_t regs[4];
|
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cpuspeed = 0;
|
|
struct sysctl_oid *oid, *leaf;
|
|
do_cpuid(0x80000000, regs);
|
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if (regs[0] < 0x80000007)
|
|
return 1;
|
|
do_cpuid(0x80000007, regs);
|
|
if (!(regs[3] & AMD_PN_FID_VID))
|
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return 2;
|
|
/* Extended CPUID signature value */
|
|
do_cpuid(0x80000001, regs);
|
|
cstate = kmalloc(sizeof(struct k8pnow_cpu_state), M_DEVBUF, M_WAITOK);
|
|
cstate->n_states = 0;
|
|
|
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status = rdmsr(MSR_AMDK7_FIDVID_STATUS);
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maxfid = PN8_STA_MFID(status);
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|
maxvid = PN8_STA_MVID(status);
|
|
|
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if (PN8_STA_SFID(status) != PN8_STA_MFID(status))
|
|
techname = "PowerNow!";
|
|
else
|
|
techname = "Cool`n'Quiet";
|
|
|
|
k8pnow_states(cstate, regs[0], maxfid, maxvid);
|
|
|
|
len = 0;
|
|
if (cstate->n_states) {
|
|
freq_len = cstate->n_states * (sizeof("9999 ")-1) + 1;
|
|
kprintf("%s speeds:",
|
|
techname);
|
|
for (i = cstate->n_states; i > 0; i--) {
|
|
state = &cstate->state_table[i-1];
|
|
kprintf(" %d", state->freq);
|
|
len += ksnprintf(freqs_available + len, freq_len - len, "%d%s",
|
|
state->freq,
|
|
i > 1 ? " " : "");
|
|
|
|
}
|
|
kprintf(" MHz\n");
|
|
k8pnow_current_state = cstate;
|
|
k8_powernow_setperf(cstate->state_table[0].freq);
|
|
} else {
|
|
kfree(cstate, M_DEVBUF);
|
|
kprintf("powernow: no power states found\n");
|
|
return 3;
|
|
}
|
|
|
|
/*
|
|
* Setup the sysctl sub-tree machdep.powernow.*
|
|
*/
|
|
oid = SYSCTL_ADD_NODE(&machdep_powernow_ctx,
|
|
SYSCTL_STATIC_CHILDREN(_machdep), OID_AUTO, "powernow",
|
|
CTLFLAG_RD, NULL, "");
|
|
if (oid == NULL)
|
|
return(EOPNOTSUPP);
|
|
oid = SYSCTL_ADD_NODE(&machdep_powernow_ctx, SYSCTL_CHILDREN(oid),
|
|
OID_AUTO, "frequency", CTLFLAG_RD, NULL, "");
|
|
if (oid == NULL)
|
|
return(EOPNOTSUPP);
|
|
leaf = SYSCTL_ADD_PROC(&machdep_powernow_ctx, SYSCTL_CHILDREN(oid),
|
|
OID_AUTO, "current", CTLTYPE_INT | CTLFLAG_RW, NULL, 0,
|
|
powernow_sysctl_helper, "I",
|
|
"Current CPU frequency for AMD PowerNow!");
|
|
if (leaf == NULL)
|
|
return(EOPNOTSUPP);
|
|
leaf = SYSCTL_ADD_STRING(&machdep_powernow_ctx, SYSCTL_CHILDREN(oid),
|
|
OID_AUTO, "available", CTLFLAG_RD, freqs_available,
|
|
sizeof(freqs_available),
|
|
"CPU frequencies supported by AMD PowerNow!");
|
|
if (leaf == NULL)
|
|
return(EOPNOTSUPP);
|
|
return(0);
|
|
}
|
|
|
|
static int
|
|
powernow_modevh(struct module *m, int what, void *arg __unused)
|
|
{
|
|
int error;
|
|
|
|
switch(what) {
|
|
case MOD_LOAD:
|
|
error = sysctl_ctx_init(&machdep_powernow_ctx);
|
|
if (error != 0)
|
|
break;
|
|
error = powernow_init();
|
|
break;
|
|
case MOD_UNLOAD:
|
|
if(k8pnow_current_state)
|
|
kfree(k8pnow_current_state, M_DEVBUF);
|
|
error = sysctl_ctx_free(&machdep_powernow_ctx);
|
|
break;
|
|
default:
|
|
error = EINVAL;
|
|
break;
|
|
}
|
|
return(error);
|
|
}
|
|
static moduledata_t powernow_mod = {
|
|
"powernow",
|
|
powernow_modevh,
|
|
NULL,
|
|
};
|
|
|
|
DECLARE_MODULE(powernow, powernow_mod, SI_BOOT2_KLD, SI_ORDER_ANY);
|