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Bug #511
closed2]: DEV 12/30 Boot fail
Status:
Closed
Priority:
Normal
Assignee:
-
Category:
-
Target version:
-
Start date:
Due date:
% Done:
0%
Estimated time:
Description
TES> Could you mention the chip used? I suspect it's an AHCI part, which can
TES> operate in AHCI mode or legacy-IDE. AHCI is supported by NATA, but NATA
TES> isn't yet ready for prime-time.
Intel(R) Q965/Q963 Express Chipset
Intel(R) 82801HB/HR I/O controller hub (ICH8/ICH8R)
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