i386-support-removal.patch

hasso, 11/07/2007 11:46 AM

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share/doc/handbook/handbook.txt
8269 8269

  
8270 8270
   This is the machine architecture. It must be either i386, or amd64.
8271 8271

  
8272
 cpu          I386_CPU
8273 8272
 cpu          I486_CPU
8274 8273
 cpu          I586_CPU
8275 8274
 cpu          I686_CPU
share/man/man7/tuning.7
747 747
options that can be commented out.
748 748
If you only want the kernel to run
749 749
on a Pentium class CPU, you can easily remove
750
.Dv I386_CPU
751
and
752 750
.Dv I486_CPU ,
753 751
but only remove
754 752
.Dv I586_CPU
755 753
if you are sure your CPU is being recognized as a Pentium II or better.
756
Some clones may be recognized as a Pentium or even a 486 and not be able
757
to boot without those options.
754
Some clones may be recognized as a Pentium and not be able to boot
755
without those options.
758 756
If it works, great!
759 757
The operating system
760 758
will be able to better-use higher-end CPU features for MMU, task switching,
sys/config/GENERIC
9 9
platform	pc32
10 10
machine		i386
11 11
machine_arch	i386
12
cpu		I386_CPU
13 12
cpu		I486_CPU
14 13
cpu		I586_CPU
15 14
cpu		I686_CPU
sys/config/LINT
116 116
#
117 117
#  An SMP kernel will ONLY run on an Intel MP spec. qualified motherboard.
118 118
#
119
#  Be sure to disable 'cpu I386_CPU' && 'cpu I486_CPU' for SMP kernels.
119
#  Be sure to disable 'cpu I486_CPU' for SMP kernels.
120 120
#
121 121
#  Check the 'Rogue SMP hardware' section to see if additional options
122 122
#   are required by your hardware.
......
143 143
#
144 144
# You must specify at least one CPU (the one you intend to run on);
145 145
# deleting the specification for CPUs you don't need to use may make
146
# parts of the system run faster.  This is especially true removing
147
# I386_CPU.
146
# parts of the system run faster.
148 147
#
149
cpu		I386_CPU
150 148
cpu		I486_CPU
151 149
cpu		I586_CPU		# aka Pentium(tm)
152 150
cpu		I686_CPU		# aka Pentium Pro(tm)
sys/cpu/i386/include/atomic.h
344 344
 * if (*_dst == _old) *_dst = _new (all 32 bit words)
345 345
 *
346 346
 * Returns 0 on failure, non-zero on success
347
 *
348
 * WARNING:
349
 * This is a !I386_CPU function.  For I386_CPU, a _slower and horrible_
350
 * version may be used by the dynamic linker
351 347
 */
352 348
#if defined(KLD_MODULE)
353 349
extern int atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new);
sys/cpu/i386/include/endian.h
99 99

  
100 100
#if defined(__GNUC__) || defined(__INTEL_COMPILER_with_DragonFly_endian)
101 101

  
102
#if (defined(_KERNEL)  && !defined(I386_CPU) && \
103
	(defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU))) || \
104
    defined(__i486__) || defined(__i586__) || defined(__i686__) || \
105
    defined(__k6__) || defined(__athlon__) || defined(__k8__) || \
106
    defined(__pentium4__)
107

  
108 102
#define __byte_swap32_var(x) \
109 103
	__extension__ ({ register __uint32_t __X = (x); \
110 104
	   __asm ("bswap %0" : "+r" (__X)); \
111 105
	   __X; })
112

  
113
#else /* !I386_CPU */
114

  
115
#define __byte_swap32_var(x) \
116
	__extension__ ({ register __uint32_t __X = (x); \
117
	   __asm ("xchgb %h0, %b0\n\trorl $16, %0\n\txchgb %h0, %b0" \
118
	       : "+q" (__X)); \
119
	   __X; })
120
#endif /* !I386_CPU */
121 106

  
122 107
#define __byte_swap16_var(x) \
123 108
	__extension__ ({ register __uint16_t __X = (x); \
sys/crypto/blowfish/arch/i386/bf_enc.S
11 11
 * XXX Should use CPP symbols defined as a result of
12 12
 * XXX `cc -mcpu=pentiumpro'.
13 13
 */
14
#if defined(I386_CPU) || defined(I486_CPU) || defined(I586_CPU)
14
#if defined(I486_CPU) || defined(I586_CPU)
15 15
#include "bf_enc_586.S"
16 16
#else
17 17
#include "bf_enc_686.S"
sys/platform/pc32/conf/options
65 65
CPU_ATHLON_SSE_HACK		opt_cpu.h
66 66

  
67 67
# The CPU type affects the endian conversion functions all over the kernel.
68
I386_CPU		opt_global.h
69 68
I486_CPU		opt_global.h
70 69
I586_CPU		opt_global.h
71 70
I686_CPU		opt_global.h
sys/platform/pc32/i386/identcpu.c
597 597
	case CPUCLASS_286:
598 598
		kprintf("286");
599 599
		break;
600
#if defined(I386_CPU)
601 600
	case CPUCLASS_386:
602 601
		kprintf("386");
603 602
		break;
604
#endif
605 603
#if defined(I486_CPU)
606 604
	case CPUCLASS_486:
607 605
		kprintf("486");
......
783 781
panicifcpuunsupported(void)
784 782
{
785 783

  
786
#if !defined(I386_CPU) && !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU)
784
#if !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU)
787 785
#error This kernel is not configured for one of the supported CPUs
788 786
#endif
789 787
	/*
......
791 789
	 * let them know if that machine type isn't configured.
792 790
	 */
793 791
	switch (cpu_class) {
794
	case CPUCLASS_286:	/* a 286 should not make it this far, anyway */
795
#if !defined(I386_CPU)
792
	/*
793
	 * A 286 and 386 should not make it this far, anyway.
794
	 */
795
	case CPUCLASS_286:
796 796
	case CPUCLASS_386:
797
#endif
798 797
#if !defined(I486_CPU)
799 798
	case CPUCLASS_486:
800 799
#endif
sys/platform/pc32/i386/machdep.c
1058 1058
	cr0 = rcr0();
1059 1059
	cr0 |= CR0_NE;			/* Done by npxinit() */
1060 1060
	cr0 |= CR0_MP | CR0_TS;		/* Done at every execve() too. */
1061
#ifdef I386_CPU
1062
	if (cpu_class != CPUCLASS_386)
1063
#endif
1064
		cr0 |= CR0_WP | CR0_AM;
1061
	cr0 |= CR0_WP | CR0_AM;
1065 1062
	load_cr0(cr0);
1066 1063
	load_gs(_udatasel);
1067 1064
}
sys/platform/pc32/i386/support.s
162 162
 */
163 163

  
164 164
/*
165
 * copyout(from_kernel, to_user, len)  - MP SAFE (if not I386_CPU)
165
 * copyout(from_kernel, to_user, len)  - MP SAFE
166 166
 */
167 167
ENTRY(copyout)
168 168
	movl	PCPU(curthread),%eax
......
200 200
	cmpl	$VM_MAX_USER_ADDRESS,%eax
201 201
	ja	copyout_fault1
202 202

  
203
#if defined(I386_CPU)
204

  
205
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
206
	cmpl	$CPUCLASS_386,cpu_class
207
	jne	3f
208
#endif
209
/*
210
 * We have to check each PTE for user write permission.
211
 * The checking may cause a page fault, so it is important to set
212
 * up everything for return via copyout_fault before here.
213
 */
214
	/* compute number of pages */
215
	movl	%edi,%ecx
216
	andl	$PAGE_MASK,%ecx
217
	addl	%ebx,%ecx
218
	decl	%ecx
219
	shrl	$IDXSHIFT+2,%ecx
220
	incl	%ecx
221

  
222
	/* compute PTE offset for start address */
223
	movl	%edi,%edx
224
	shrl	$IDXSHIFT,%edx
225
	andb	$0xfc,%dl
226

  
227
1:
228
	/* check PTE for each page */
229
	leal	PTmap(%edx),%eax
230
	shrl	$IDXSHIFT,%eax
231
	andb	$0xfc,%al
232
	testb	$PG_V,PTmap(%eax)		/* PTE page must be valid */
233
	je	4f
234
	movb	PTmap(%edx),%al
235
	andb	$PG_V|PG_RW|PG_U,%al		/* page must be valid and user writable */
236
	cmpb	$PG_V|PG_RW|PG_U,%al
237
	je	2f
238

  
239
4:
240
	/* simulate a trap */
241
	pushl	%edx
242
	pushl	%ecx
243
	shll	$IDXSHIFT,%edx
244
	pushl	%edx
245
	call	trapwrite			/* trapwrite(addr) */
246
	popl	%edx
247
	popl	%ecx
248
	popl	%edx
249

  
250
	testl	%eax,%eax			/* if not ok, return EFAULT */
251
	jnz	copyout_fault1
252

  
253
2:
254
	addl	$4,%edx
255
	decl	%ecx
256
	jnz	1b				/* check next page */
257
#endif /* I386_CPU */
258

  
259 203
	/*
260 204
	 * Convert copyout to memcpy_vector(dest:%edi, src:%esi, conut:%ecx)
261 205
	 */
262
3:
263 206
	movl	%ebx,%ecx
264 207
	call	*memcpy_vector
265 208

  
......
406 349
	ret
407 350

  
408 351
/*
409
 * su{byte,sword,word} - MP SAFE (if not I386_CPU)
352
 * su{byte,sword,word} - MP SAFE
410 353
 *
411 354
 *	Write a byte (word, longword) to user memory
412 355
 */
......
416 359
	movl	$fusufault,PCB_ONFAULT(%ecx)
417 360
	movl	4(%esp),%edx
418 361

  
419
#if defined(I386_CPU)
420

  
421
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
422
	cmpl	$CPUCLASS_386,cpu_class
423
	jne	2f				/* we only have to set the right segment selector */
424
#endif /* I486_CPU || I586_CPU || I686_CPU */
425

  
426
	/* XXX - page boundary crossing is still not handled */
427
	movl	%edx,%eax
428
	shrl	$IDXSHIFT,%edx
429
	andb	$0xfc,%dl
430

  
431
	leal	PTmap(%edx),%ecx
432
	shrl	$IDXSHIFT,%ecx
433
	andb	$0xfc,%cl
434
	testb	$PG_V,PTmap(%ecx)		/* PTE page must be valid */
435
	je	4f
436
	movb	PTmap(%edx),%dl
437
	andb	$PG_V|PG_RW|PG_U,%dl		/* page must be valid and user writable */
438
	cmpb	$PG_V|PG_RW|PG_U,%dl
439
	je	1f
440

  
441
4:
442
	/* simulate a trap */
443
	pushl	%eax
444
	call	trapwrite
445
	popl	%edx				/* remove junk parameter from stack */
446
	testl	%eax,%eax
447
	jnz	fusufault
448
1:
449
	movl	4(%esp),%edx
450
#endif
451

  
452
2:
453 362
	cmpl	$VM_MAX_USER_ADDRESS-4,%edx	/* verify address validity */
454 363
	ja	fusufault
455 364

  
......
462 371
	ret
463 372

  
464 373
/*
465
 * susword - MP SAFE (if not I386_CPU)
374
 * susword - MP SAFE
466 375
 */
467 376
ENTRY(susword)
468 377
	movl	PCPU(curthread),%ecx
......
470 379
	movl	$fusufault,PCB_ONFAULT(%ecx)
471 380
	movl	4(%esp),%edx
472 381

  
473
#if defined(I386_CPU)
474

  
475
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
476
	cmpl	$CPUCLASS_386,cpu_class
477
	jne	2f
478
#endif /* I486_CPU || I586_CPU || I686_CPU */
479

  
480
	/* XXX - page boundary crossing is still not handled */
481
	movl	%edx,%eax
482
	shrl	$IDXSHIFT,%edx
483
	andb	$0xfc,%dl
484

  
485
	leal	PTmap(%edx),%ecx
486
	shrl	$IDXSHIFT,%ecx
487
	andb	$0xfc,%cl
488
	testb	$PG_V,PTmap(%ecx)		/* PTE page must be valid */
489
	je	4f
490
	movb	PTmap(%edx),%dl
491
	andb	$PG_V|PG_RW|PG_U,%dl		/* page must be valid and user writable */
492
	cmpb	$PG_V|PG_RW|PG_U,%dl
493
	je	1f
494

  
495
4:
496
	/* simulate a trap */
497
	pushl	%eax
498
	call	trapwrite
499
	popl	%edx				/* remove junk parameter from stack */
500
	testl	%eax,%eax
501
	jnz	fusufault
502
1:
503
	movl	4(%esp),%edx
504
#endif
505

  
506
2:
507 382
	cmpl	$VM_MAX_USER_ADDRESS-2,%edx	/* verify address validity */
508 383
	ja	fusufault
509 384

  
......
516 391
	ret
517 392

  
518 393
/*
519
 * subyte - MP SAFE (if not I386_CPU)
394
 * subyte - MP SAFE
520 395
 */
521 396
ENTRY(subyte)
522 397
	movl	PCPU(curthread),%ecx
......
524 399
	movl	$fusufault,PCB_ONFAULT(%ecx)
525 400
	movl	4(%esp),%edx
526 401

  
527
#if defined(I386_CPU)
528

  
529
#if defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)
530
	cmpl	$CPUCLASS_386,cpu_class
531
	jne	2f
532
#endif /* I486_CPU || I586_CPU || I686_CPU */
533

  
534
	movl	%edx,%eax
535
	shrl	$IDXSHIFT,%edx
536
	andb	$0xfc,%dl
537

  
538
	leal	PTmap(%edx),%ecx
539
	shrl	$IDXSHIFT,%ecx
540
	andb	$0xfc,%cl
541
	testb	$PG_V,PTmap(%ecx)		/* PTE page must be valid */
542
	je	4f
543
	movb	PTmap(%edx),%dl
544
	andb	$PG_V|PG_RW|PG_U,%dl		/* page must be valid and user writable */
545
	cmpb	$PG_V|PG_RW|PG_U,%dl
546
	je	1f
547

  
548
4:
549
	/* simulate a trap */
550
	pushl	%eax
551
	call	trapwrite
552
	popl	%edx				/* remove junk parameter from stack */
553
	testl	%eax,%eax
554
	jnz	fusufault
555
1:
556
	movl	4(%esp),%edx
557
#endif
558

  
559
2:
560 402
	cmpl	$VM_MAX_USER_ADDRESS-1,%edx	/* verify address validity */
561 403
	ja	fusufault
562 404

  
sys/platform/vkernel/i386/cpu_regs.c
853 853
	cr0 = rcr0();
854 854
	cr0 |= CR0_NE;			/* Done by npxinit() */
855 855
	cr0 |= CR0_MP | CR0_TS;		/* Done at every execve() too. */
856
#ifdef I386_CPU
857
	if (cpu_class != CPUCLASS_386)
858
#endif
859
		cr0 |= CR0_WP | CR0_AM;
856
	cr0 |= CR0_WP | CR0_AM;
860 857
	load_cr0(cr0);
861 858
	load_gs(_udatasel);
862 859
#endif