Submit #3031 » radeon_4_07.diff
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/Makefile 2016-10-22 03:07:05.000000000 -0700 | ||
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#
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# Makefile for the drm device(radeonkms) driver.
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#
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# Please keep SRC list structured in blocks and sorted.
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#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/amd/include
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hostprogs-y := mkregtable
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clean-files := rn50_reg_safe.h r100_reg_safe.h r200_reg_safe.h rv515_reg_safe.h r300_reg_safe.h r420_reg_safe.h rs600_reg_safe.h r600_reg_safe.h evergreen_reg_safe.h cayman_reg_safe.h
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quiet_cmd_mkregtable = MKREGTABLE $@
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cmd_mkregtable = $(obj)/mkregtable $< > $@
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$(obj)/rn50_reg_safe.h: $(src)/reg_srcs/rn50 $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/r100_reg_safe.h: $(src)/reg_srcs/r100 $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/r200_reg_safe.h: $(src)/reg_srcs/r200 $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/r420_reg_safe.h: $(src)/reg_srcs/r420 $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/r600_reg_safe.h: $(src)/reg_srcs/r600 $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/evergreen_reg_safe.h: $(src)/reg_srcs/evergreen $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/cayman_reg_safe.h: $(src)/reg_srcs/cayman $(obj)/mkregtable
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$(call if_changed,mkregtable)
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$(obj)/r100.o: $(obj)/r100_reg_safe.h $(obj)/rn50_reg_safe.h
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$(obj)/r200.o: $(obj)/r200_reg_safe.h
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$(obj)/rv515.o: $(obj)/rv515_reg_safe.h
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$(obj)/r300.o: $(obj)/r300_reg_safe.h
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$(obj)/r420.o: $(obj)/r420_reg_safe.h
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$(obj)/rs600.o: $(obj)/rs600_reg_safe.h
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$(obj)/r600_cs.o: $(obj)/r600_reg_safe.h
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$(obj)/evergreen_cs.o: $(obj)/evergreen_reg_safe.h $(obj)/cayman_reg_safe.h
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radeon-y := radeon_drv.o
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# add KMS driver
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radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
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radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \
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atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \
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radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \
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radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \
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radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \
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radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
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rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
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r200.o radeon_legacy_tv.o r600_cs.o r600_blit_shaders.o \
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radeon_pm.o atombios_dp.o r600_hdmi.o dce3_1_afmt.o \
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evergreen.o evergreen_cs.o evergreen_blit_shaders.o \
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evergreen_hdmi.o radeon_trace_points.o ni.o cayman_blit_shaders.o \
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atombios_encoders.o radeon_semaphore.o radeon_sa.o atombios_i2c.o si.o \
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si_blit_shaders.o radeon_prime.o cik.o cik_blit_shaders.o \
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r600_dpm.o rs780_dpm.o rv6xx_dpm.o rv770_dpm.o rv730_dpm.o rv740_dpm.o \
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rv770_smc.o cypress_dpm.o btc_dpm.o sumo_dpm.o sumo_smc.o trinity_dpm.o \
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trinity_smc.o ni_dpm.o si_smc.o si_dpm.o kv_smc.o kv_dpm.o ci_smc.o \
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ci_dpm.o dce6_afmt.o radeon_vm.o radeon_ucode.o radeon_ib.o \
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radeon_sync.o radeon_audio.o radeon_dp_auxch.o radeon_dp_mst.o
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radeon-$(CONFIG_MMU_NOTIFIER) += radeon_mn.o
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# add async DMA block
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radeon-y += \
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r600_dma.o \
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rv770_dma.o \
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evergreen_dma.o \
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ni_dma.o \
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si_dma.o \
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cik_sdma.o \
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KMOD = radeonkms
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SRCS = \
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rn50_reg_safe.h \
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r100_reg_safe.h \
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r200_reg_safe.h \
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rv515_reg_safe.h \
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r300_reg_safe.h \
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r420_reg_safe.h \
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rs600_reg_safe.h \
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r600_reg_safe.h \
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evergreen_reg_safe.h \
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cayman_reg_safe.h
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SRCS += \
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radeon_acpi.c \
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radeon_agp.c \
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radeon_asic.c \
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radeon_atombios.c \
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radeon_audio.c \
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radeon_benchmark.c \
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radeon_bios.c \
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radeon_clocks.c \
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radeon_combios.c \
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radeon_connectors.c \
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radeon_cs.c \
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radeon_cursor.c \
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radeon_device.c \
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radeon_display.c \
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radeon_dp_auxch.c \
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radeon_drv.c \
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radeon_encoders.c \
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radeon_fb.c \
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radeon_fence.c \
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radeon_gart.c \
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radeon_gem.c \
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radeon_i2c.c \
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radeon_ib.c \
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radeon_irq_kms.c \
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radeon_kms.c \
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radeon_legacy_crtc.c \
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radeon_legacy_encoders.c \
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radeon_legacy_tv.c \
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radeon_object.c \
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radeon_pm.c \
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radeon_ring.c \
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radeon_sa.c \
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radeon_semaphore.c \
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radeon_test.c \
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radeon_ttm.c \
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radeon_ucode.c \
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radeon_vm.c \
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atom.c \
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atombios_crtc.c \
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atombios_dp.c \
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atombios_encoders.c \
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atombios_i2c.c \
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r100.c \
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r200.c \
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r300.c \
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r420.c \
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rs400.c \
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rs600.c \
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rs690.c \
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rv515.c \
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r520.c \
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r600.c \
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r600_blit_shaders.c \
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r600_cs.c \
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r600_hdmi.c \
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rv770.c \
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dce3_1_afmt.c \
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evergreen.c \
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evergreen_blit_shaders.c \
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evergreen_cs.c \
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evergreen_hdmi.c \
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cayman_blit_shaders.c \
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ni.c \
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si.c \
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si_blit_shaders.c \
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cik.c \
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cik_blit_shaders.c \
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r600_dpm.c \
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rs780_dpm.c \
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rv6xx_dpm.c \
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rv770_dpm.c \
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rv730_dpm.c \
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rv740_dpm.c \
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rv770_smc.c \
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cypress_dpm.c \
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btc_dpm.c \
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sumo_dpm.c \
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sumo_smc.c \
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trinity_dpm.c \
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trinity_smc.c \
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ni_dpm.c \
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si_smc.c \
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si_dpm.c \
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kv_smc.c \
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kv_dpm.c \
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ci_smc.c \
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ci_dpm.c \
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dce6_afmt.c
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# async DMA block
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SRCS += \
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r600_dma.c \
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rv770_dma.c \
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evergreen_dma.c \
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ni_dma.c \
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si_dma.c \
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cik_sdma.c
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# UVD block
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SRCS += \
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radeon_uvd.c \
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uvd_v1_0.c \
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uvd_v2_2.c \
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uvd_v3_1.c \
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uvd_v4_2.c
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# add UVD block
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radeon-y += \
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radeon_uvd.o \
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uvd_v1_0.o \
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uvd_v2_2.o \
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uvd_v3_1.o \
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uvd_v4_2.o
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# add VCE block
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SRCS += \
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radeon_vce.c \
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vce_v1_0.c \
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vce_v2_0.c
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#radeon_ioc32.c
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#radeon_prime.c
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#--radeon_trace_points.c
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SRCS += \
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opt_acpi.h \
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opt_drm.h \
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opt_ktr.h \
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acpi_if.h \
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bus_if.h \
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device_if.h \
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iicbb_if.h \
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iicbus_if.h \
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pci_if.h
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radeon-y += \
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radeon_vce.o \
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vce_v1_0.o \
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vce_v2_0.o \
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radeon_kfd.o
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radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
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radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o
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radeon-$(CONFIG_ACPI) += radeon_acpi.o
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KCFLAGS+= -I${SYSDIR}/dev/drm/include
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KCFLAGS+= -I${SYSDIR}/contrib/dev/acpica/source/include
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obj-$(CONFIG_DRM_RADEON)+= radeon.o
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.include <bsd.kmod.mk>
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CFLAGS_radeon_trace_points.o := -I$(src)
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/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atom.c 2016-10-22 03:07:05.000000000 -0700 | ||
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <asm/unaligned.h>
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#define ATOM_DEBUG
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... | ... | |
#include "atom-names.h"
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#include "atom-bits.h"
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#include "radeon.h"
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#include <linux/delay.h>
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#define ATOM_COND_ABOVE 0
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#define ATOM_COND_ABOVEOREQUAL 1
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... | ... | |
int atom_debug = 0;
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static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
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int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
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static uint32_t atom_arg_mask[8] = {
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0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
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... | ... | |
static void debug_print_spaces(int n)
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{
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while (n--)
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kprintf(" ");
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printk(" ");
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}
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#ifdef DEBUG
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#undef DEBUG
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#endif
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#ifdef SDEBUG
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#undef SDEBUG
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#endif
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#define DEBUG(...) do if (atom_debug) { kprintf(__FILE__ __VA_ARGS__); } while (0)
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#define SDEBUG(...) do if (atom_debug) { kprintf(__FILE__); debug_print_spaces(debug_depth); kprintf(__VA_ARGS__); } while (0)
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#else /* !ATOM_DEBUG */
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#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
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#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
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#else
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#define DEBUG(...) do { } while (0)
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#define SDEBUG(...) do { } while (0)
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#endif /* ATOM_DEBUG */
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#endif
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static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
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uint32_t index, uint32_t data)
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... | ... | |
case ATOM_IIO_END:
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return temp;
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default:
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DRM_INFO("Unknown IIO opcode.\n");
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printk(KERN_INFO "Unknown IIO opcode.\n");
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return 0;
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}
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}
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... | ... | |
struct atom_context *gctx = ctx->ctx;
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arg = attr & 7;
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align = (attr >> 3) & 7;
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if (saved)
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*saved = 0; /* avoid bogus gcc warning */
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switch (arg) {
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case ATOM_ARG_REG:
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idx = U16(*ptr);
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... | ... | |
val = gctx->card->reg_read(gctx->card, idx);
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break;
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case ATOM_IO_PCI:
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DRM_INFO(
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printk(KERN_INFO
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"PCI registers are not implemented.\n");
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return 0;
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case ATOM_IO_SYSIO:
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DRM_INFO(
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printk(KERN_INFO
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"SYSIO registers are not implemented.\n");
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return 0;
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default:
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if (!(gctx->io_mode & 0x80)) {
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DRM_INFO("Bad IO mode.\n");
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printk(KERN_INFO "Bad IO mode.\n");
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return 0;
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}
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if (!gctx->iio[gctx->io_mode & 0x7F]) {
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DRM_INFO(
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printk(KERN_INFO
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"Undefined indirect IO read method %d.\n",
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gctx->io_mode & 0x7F);
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return 0;
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... | ... | |
gctx->card->reg_write(gctx->card, idx, val);
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break;
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case ATOM_IO_PCI:
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DRM_INFO(
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printk(KERN_INFO
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"PCI registers are not implemented.\n");
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return;
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case ATOM_IO_SYSIO:
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DRM_INFO(
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printk(KERN_INFO
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"SYSIO registers are not implemented.\n");
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return;
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default:
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if (!(gctx->io_mode & 0x80)) {
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DRM_INFO("Bad IO mode.\n");
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printk(KERN_INFO "Bad IO mode.\n");
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return;
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}
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if (!gctx->iio[gctx->io_mode & 0xFF]) {
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DRM_INFO(
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printk(KERN_INFO
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"Undefined indirect IO write method %d.\n",
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gctx->io_mode & 0x7F);
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return;
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... | ... | |
static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
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{
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DRM_INFO("ATOM BIOS beeped!\n");
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printk("ATOM BIOS beeped!\n");
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}
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static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
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... | ... | |
static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
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{
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DRM_INFO("unimplemented!\n");
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printk(KERN_INFO "unimplemented!\n");
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}
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static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
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{
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DRM_INFO("unimplemented!\n");
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printk(KERN_INFO "unimplemented!\n");
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}
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static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
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{
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DRM_INFO("unimplemented!\n");
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printk(KERN_INFO "unimplemented!\n");
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}
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static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
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... | ... | |
}
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(*ptr) += 2;
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} else {
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DRM_INFO("Bad case.\n");
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printk(KERN_INFO "Bad case.\n");
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return;
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}
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(*ptr) += 2;
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... | ... | |
static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
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{
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DRM_INFO("unimplemented!\n");
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printk(KERN_INFO "unimplemented!\n");
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}
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static struct {
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... | ... | |
ctx->bios = bios;
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if (CU16(0) != ATOM_BIOS_MAGIC) {
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DRM_INFO("Invalid BIOS magic.\n");
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printk(KERN_INFO "Invalid BIOS magic.\n");
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kfree(ctx);
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return NULL;
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}
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if (strncmp
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(CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
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strlen(ATOM_ATI_MAGIC))) {
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DRM_INFO("Invalid ATI magic.\n");
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printk(KERN_INFO "Invalid ATI magic.\n");
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kfree(ctx);
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return NULL;
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}
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... | ... | |
if (strncmp
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(CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
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strlen(ATOM_ROM_MAGIC))) {
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DRM_INFO("Invalid ATOM magic.\n");
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printk(KERN_INFO "Invalid ATOM magic.\n");
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kfree(ctx);
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return NULL;
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}
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... | ... | |
break;
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}
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}
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DRM_INFO("ATOM BIOS: %s\n", name);
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printk(KERN_INFO "ATOM BIOS: %s\n", name);
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return ctx;
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}
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... | ... | |
{
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int offset = index * 2 + 4;
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int idx = CU16(ctx->data_table + offset);
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u16 *mdt = (u16 *)((char *)ctx->bios + ctx->data_table + 4);
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u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
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if (!mdt[index])
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return false;
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... | ... | |
{
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int offset = index * 2 + 4;
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int idx = CU16(ctx->cmd_table + offset);
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u16 *mct = (u16 *)((char *)ctx->bios + ctx->cmd_table + 4);
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u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
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if (!mct[index])
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return false;
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... | ... | |
struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
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if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
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firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)((char *)ctx->bios + data_offset);
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firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
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DRM_DEBUG("atom firmware requested %08x %dkb\n",
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le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
|
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atom.h 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
#ifndef ATOM_H
|
||
#define ATOM_H
|
||
#include <linux/types.h>
|
||
#include <drm/drmP.h>
|
||
#define ATOM_BIOS_MAGIC 0xAA55
|
||
... | ... | |
struct atom_context {
|
||
struct card_info *card;
|
||
struct lock mutex;
|
||
struct lock scratch_mutex;
|
||
uint8_t *bios;
|
||
struct mutex mutex;
|
||
struct mutex scratch_mutex;
|
||
void *bios;
|
||
uint32_t cmd_table, data_table;
|
||
uint16_t *iio;
|
||
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios.h 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
#endif /* _ATOMBIOS_H */
|
||
#include "pptable.h"
|
||
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios_crtc.c 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
#include <drm/drmP.h>
|
||
#include <drm/drm_crtc_helper.h>
|
||
#include <drm/drm_fb_helper.h>
|
||
#include <uapi_drm/radeon_drm.h>
|
||
#include <drm/radeon_drm.h>
|
||
#include <drm/drm_fixed.h>
|
||
#include "radeon.h"
|
||
#include "atom.h"
|
||
... | ... | |
}
|
||
}
|
||
if (radeon_encoder->is_mst_encoder) {
|
||
struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
|
||
struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
|
||
dp_clock = dig_connector->dp_clock;
|
||
}
|
||
/* use recommended ref_div for ss */
|
||
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
|
||
if (radeon_crtc->ss_enabled) {
|
||
... | ... | |
radeon_crtc->bpc = 8;
|
||
radeon_crtc->ss_enabled = false;
|
||
if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||
|
||
if (radeon_encoder->is_mst_encoder) {
|
||
radeon_dp_mst_prepare_pll(crtc, mode);
|
||
} else if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||
|
||
(radeon_encoder_get_dp_bridge_encoder_id(radeon_crtc->encoder) != ENCODER_OBJECT_ID_NONE)) {
|
||
struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
|
||
struct drm_connector *connector =
|
||
... | ... | |
if (atomic)
|
||
fb_location = radeon_bo_gpu_offset(rbo);
|
||
else {
|
||
r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, (u64 *)&fb_location);
|
||
r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
|
||
if (unlikely(r != 0)) {
|
||
radeon_bo_unreserve(rbo);
|
||
return -EINVAL;
|
||
... | ... | |
if (atomic)
|
||
fb_location = radeon_bo_gpu_offset(rbo);
|
||
else {
|
||
r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, (u64 *)&fb_location);
|
||
r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
|
||
if (unlikely(r != 0)) {
|
||
radeon_bo_unreserve(rbo);
|
||
return -EINVAL;
|
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios_dp.c 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
* Jerome Glisse
|
||
*/
|
||
#include <drm/drmP.h>
|
||
#include <uapi_drm/radeon_drm.h>
|
||
#include <drm/radeon_drm.h>
|
||
#include "radeon.h"
|
||
#include "atom.h"
|
||
... | ... | |
return;
|
||
if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3)
|
||
DRM_DEBUG_KMS("Sink OUI: %02hhx%02hhx%02hhx\n",
|
||
DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",
|
||
buf[0], buf[1], buf[2]);
|
||
if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3)
|
||
DRM_DEBUG_KMS("Branch OUI: %02hhx%02hhx%02hhx\n",
|
||
DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",
|
||
buf[0], buf[1], buf[2]);
|
||
}
|
||
... | ... | |
u8 msg[DP_DPCD_SIZE];
|
||
int ret, i;
|
||
char dpcd_hex_dump[DP_DPCD_SIZE * 3];
|
||
for (i = 0; i < 7; i++) {
|
||
ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg,
|
||
DP_DPCD_SIZE);
|
||
if (ret == DP_DPCD_SIZE) {
|
||
memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);
|
||
DRM_DEBUG_KMS("DPCD: %s\n", hexncpy(dig_connector->dpcd,
|
||
sizeof(dig_connector->dpcd),
|
||
dpcd_hex_dump, sizeof(dpcd_hex_dump), " "));
|
||
DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd),
|
||
dig_connector->dpcd);
|
||
radeon_dp_probe_oui(radeon_connector);
|
||
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios_encoders.c 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
*/
|
||
#include <drm/drmP.h>
|
||
#include <drm/drm_crtc_helper.h>
|
||
#include <uapi_drm/radeon_drm.h>
|
||
#include <drm/radeon_drm.h>
|
||
#include "radeon.h"
|
||
#include "radeon_audio.h"
|
||
#include "radeon_asic.h"
|
||
#include "atom.h"
|
||
#include <linux/backlight.h>
|
||
extern int atom_debug;
|
||
static u8
|
||
radeon_atom_get_backlight_level_from_reg(struct radeon_device *rdev)
|
||
... | ... | |
if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU))
|
||
return;
|
||
pdata = kmalloc(sizeof(struct radeon_backlight_privdata),
|
||
M_DRM, M_WAITOK);
|
||
pdata = kmalloc(sizeof(struct radeon_backlight_privdata), GFP_KERNEL);
|
||
if (!pdata) {
|
||
DRM_ERROR("Memory allocation failed\n");
|
||
goto error;
|
||
... | ... | |
#else /* !CONFIG_BACKLIGHT_CLASS_DEVICE */
|
||
/*
|
||
* Read max backlight level
|
||
*/
|
||
static int
|
||
sysctl_backlight_max(SYSCTL_HANDLER_ARGS)
|
||
{
|
||
int err, val;
|
||
val = RADEON_MAX_BL_LEVEL;
|
||
err = sysctl_handle_int(oidp, &val, 0, req);
|
||
return(err);
|
||
}
|
||
/*
|
||
* Read/write backlight level
|
||
*/
|
||
static int
|
||
sysctl_backlight_handler(SYSCTL_HANDLER_ARGS)
|
||
void radeon_atom_backlight_init(struct radeon_encoder *encoder)
|
||
{
|
||
struct radeon_encoder *encoder;
|
||
struct radeon_encoder_atom_dig *dig;
|
||
int err, val;
|
||
encoder = (struct radeon_encoder *)arg1;
|
||
dig = encoder->enc_priv;
|
||
val = dig->backlight_level;
|
||
err = sysctl_handle_int(oidp, &val, 0, req);
|
||
if (err != 0 || req->newptr == NULL) {
|
||
return(err);
|
||
}
|
||
if (dig->backlight_level != val && val >= 0 &&
|
||
val <= RADEON_MAX_BL_LEVEL) {
|
||
atombios_set_backlight_level(encoder, val);
|
||
}
|
||
return(err);
|
||
}
|
||
void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder,
|
||
struct drm_connector *drm_connector)
|
||
{
|
||
struct drm_device *dev = radeon_encoder->base.dev;
|
||
struct radeon_device *rdev = dev->dev_private;
|
||
struct radeon_encoder_atom_dig *dig;
|
||
if (!radeon_encoder->enc_priv)
|
||
return;
|
||
if (!rdev->is_atom_bios)
|
||
return;
|
||
if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU))
|
||
return;
|
||
dig = radeon_encoder->enc_priv;
|
||
dig->backlight_level = radeon_atom_get_backlight_level_from_reg(rdev);
|
||
DRM_INFO("radeon atom DIG backlight initialized\n");
|
||
rdev->mode_info.bl_encoder = radeon_encoder;
|
||
SYSCTL_ADD_PROC(&drm_connector->dev->sysctl->ctx, &sysctl__hw_children,
|
||
OID_AUTO, "backlight_max",
|
||
CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_ANYBODY,
|
||
radeon_encoder, sizeof(int),
|
||
sysctl_backlight_max,
|
||
"I", "Max backlight level");
|
||
SYSCTL_ADD_PROC(&drm_connector->dev->sysctl->ctx, &sysctl__hw_children,
|
||
OID_AUTO, "backlight_level",
|
||
CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_ANYBODY,
|
||
radeon_encoder, sizeof(int),
|
||
sysctl_backlight_handler,
|
||
"I", "Backlight level");
|
||
return;
|
||
}
|
||
static void radeon_atom_backlight_exit(struct radeon_encoder *encoder)
|
||
... | ... | |
#endif
|
||
/* evil but including atombios.h is much worse */
|
||
bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
|
||
struct drm_display_mode *mode);
|
||
static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
|
||
const struct drm_display_mode *mode,
|
||
... | ... | |
struct drm_connector *connector;
|
||
struct radeon_connector *radeon_connector;
|
||
struct radeon_connector_atom_dig *dig_connector;
|
||
struct radeon_encoder_atom_dig *dig_enc;
|
||
if (radeon_encoder_is_digital(encoder)) {
|
||
dig_enc = radeon_encoder->enc_priv;
|
||
if (dig_enc->active_mst_links)
|
||
return ATOM_ENCODER_MODE_DP_MST;
|
||
}
|
||
if (radeon_encoder->is_mst_encoder || radeon_encoder->offset)
|
||
return ATOM_ENCODER_MODE_DP_MST;
|
||
/* dp bridges are always DP */
|
||
if (radeon_encoder_get_dp_bridge_encoder_id(encoder) != ENCODER_OBJECT_ID_NONE)
|
||
return ATOM_ENCODER_MODE_DP;
|
||
... | ... | |
case DRM_MODE_DPMS_STANDBY:
|
||
case DRM_MODE_DPMS_SUSPEND:
|
||
case DRM_MODE_DPMS_OFF:
|
||
/* don't power off encoders with active MST links */
|
||
if (dig->active_mst_links)
|
||
return;
|
||
if (ASIC_IS_DCE4(rdev)) {
|
||
if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector)
|
||
atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
|
||
... | ... | |
radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
|
||
}
|
||
void
|
||
atombios_set_mst_encoder_crtc_source(struct drm_encoder *encoder, int fe)
|
||
{
|
||
struct drm_device *dev = encoder->dev;
|
||
struct radeon_device *rdev = dev->dev_private;
|
||
struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
|
||
int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source);
|
||
uint8_t frev, crev;
|
||
union crtc_source_param args;
|
||
memset(&args, 0, sizeof(args));
|
||
if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
|
||
return;
|
||
if (frev != 1 && crev != 2)
|
||
DRM_ERROR("Unknown table for MST %d, %d\n", frev, crev);
|
||
args.v2.ucCRTC = radeon_crtc->crtc_id;
|
||
args.v2.ucEncodeMode = ATOM_ENCODER_MODE_DP_MST;
|
||
switch (fe) {
|
||
case 0:
|
||
args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
|
||
break;
|
||
case 1:
|
||
args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
|
||
break;
|
||
case 2:
|
||
args.v2.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID;
|
||
break;
|
||
case 3:
|
||
args.v2.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID;
|
||
break;
|
||
case 4:
|
||
args.v2.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID;
|
||
break;
|
||
case 5:
|
||
args.v2.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID;
|
||
break;
|
||
case 6:
|
||
args.v2.ucEncoderID = ASIC_INT_DIG7_ENCODER_ID;
|
||
break;
|
||
}
|
||
atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
|
||
}
|
||
static void
|
||
atombios_apply_encoder_quirks(struct drm_encoder *encoder,
|
||
struct drm_display_mode *mode)
|
||
... | ... | |
}
|
||
static bool radeon_atom_ext_mode_fixup(struct drm_encoder *encoder,
|
||
const struct drm_display_mode *mode,
|
||
struct drm_display_mode *adjusted_mode)
|
||
{
|
||
return true;
|
||
}
|
||
static const struct drm_encoder_helper_funcs radeon_atom_ext_helper_funcs = {
|
||
.dpms = radeon_atom_ext_dpms,
|
||
.mode_fixup = radeon_atom_ext_mode_fixup,
|
||
.prepare = radeon_atom_ext_prepare,
|
||
.mode_set = radeon_atom_ext_mode_set,
|
||
.commit = radeon_atom_ext_commit,
|
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios_i2c.c 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
*
|
||
* Authors: Alex Deucher
|
||
*
|
||
* $FreeBSD: head/sys/dev/drm2/radeon/atombios_i2c.c 254885 2013-08-25 19:37:15Z dumbbell $
|
||
*/
|
||
#include <drm/drmP.h>
|
||
#include <uapi_drm/radeon_drm.h>
|
||
#include <bus/iicbus/iic.h>
|
||
#include <bus/iicbus/iiconf.h>
|
||
#include <bus/iicbus/iicbus.h>
|
||
#include <drm/radeon_drm.h>
|
||
#include "radeon.h"
|
||
#include "atom.h"
|
||
#include "iicbus_if.h"
|
||
#include "iicbb_if.h"
|
||
#define TARGET_HW_I2C_CLOCK 50
|
||
... | ... | |
#define ATOM_MAX_HW_I2C_WRITE 3
|
||
#define ATOM_MAX_HW_I2C_READ 255
|
||
int radeon_atom_hw_i2c_xfer(device_t dev, struct iic_msg *msgs, u_int num);
|
||
static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
|
||
u8 slave_addr, u8 flags,
|
||
u8 *buf, u8 num)
|
||
... | ... | |
return r;
|
||
}
|
||
int radeon_atom_hw_i2c_xfer(device_t dev, struct iic_msg *msgs, u_int num)
|
||
int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
|
||
struct i2c_msg *msgs, int num)
|
||
{
|
||
struct radeon_i2c_chan *i2c = device_get_softc(dev);
|
||
struct iic_msg *p;
|
||
struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
|
||
struct i2c_msg *p;
|
||
int i, remaining, current_count, buffer_offset, max_bytes, ret;
|
||
u8 flags;
|
||
... | ... | |
p = &msgs[0];
|
||
if ((num == 1) && (p->len == 0)) {
|
||
ret = radeon_process_i2c_ch(i2c,
|
||
p->slave, HW_I2C_WRITE,
|
||
p->addr, HW_I2C_WRITE,
|
||
NULL, 0);
|
||
if (ret)
|
||
return ret;
|
||
else
|
||
return (0);
|
||
return num;
|
||
}
|
||
for (i = 0; i < num; i++) {
|
||
... | ... | |
remaining = p->len;
|
||
buffer_offset = 0;
|
||
/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
|
||
if (p->flags & IIC_M_RD) {
|
||
if (p->flags & I2C_M_RD) {
|
||
max_bytes = ATOM_MAX_HW_I2C_READ;
|
||
flags = HW_I2C_READ;
|
||
} else {
|
||
... | ... | |
else
|
||
current_count = remaining;
|
||
ret = radeon_process_i2c_ch(i2c,
|
||
p->slave, flags,
|
||
p->addr, flags,
|
||
&p->buf[buffer_offset], current_count);
|
||
if (ret)
|
||
return ret;
|
||
... | ... | |
}
|
||
}
|
||
return (0);
|
||
}
|
||
static int
|
||
radeon_atom_hw_i2c_probe(device_t dev)
|
||
{
|
||
return (BUS_PROBE_SPECIFIC);
|
||
}
|
||
static int
|
||
radeon_atom_hw_i2c_attach(device_t dev)
|
||
{
|
||
struct radeon_i2c_chan *i2c;
|
||
device_t iic_dev;
|
||
i2c = device_get_softc(dev);
|
||
device_set_desc(dev, i2c->name);
|
||
/* add generic bit-banging code */
|
||
iic_dev = device_add_child(dev, "iicbus", -1);
|
||
if (iic_dev == NULL)
|
||
return (ENXIO);
|
||
device_quiet(iic_dev);
|
||
/* attach and probe added child */
|
||
bus_generic_attach(dev);
|
||
return (0);
|
||
return num;
|
||
}
|
||
static int
|
||
radeon_atom_hw_i2c_detach(device_t dev)
|
||
u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
|
||
{
|
||
/* detach bit-banding code. */
|
||
bus_generic_detach(dev);
|
||
/* delete bit-banding code. */
|
||
device_delete_children(dev);
|
||
return (0);
|
||
}
|
||
static int
|
||
radeon_atom_hw_i2c_reset(device_t dev, u_char speed,
|
||
u_char addr, u_char *oldaddr)
|
||
{
|
||
return (0);
|
||
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
|
||
}
|
||
static device_method_t radeon_atom_hw_i2c_methods[] = {
|
||
DEVMETHOD(device_probe, radeon_atom_hw_i2c_probe),
|
||
DEVMETHOD(device_attach, radeon_atom_hw_i2c_attach),
|
||
DEVMETHOD(device_detach, radeon_atom_hw_i2c_detach),
|
||
DEVMETHOD(iicbus_reset, radeon_atom_hw_i2c_reset),
|
||
DEVMETHOD(iicbus_transfer, radeon_atom_hw_i2c_xfer),
|
||
DEVMETHOD_END
|
||
};
|
||
static driver_t radeon_atom_hw_i2c_driver = {
|
||
"radeon_atom_hw_i2c",
|
||
radeon_atom_hw_i2c_methods,
|
||
0
|
||
};
|
||
static devclass_t radeon_atom_hw_i2c_devclass;
|
||
DRIVER_MODULE_ORDERED(radeon_atom_hw_i2c, drm, radeon_atom_hw_i2c_driver,
|
||
radeon_atom_hw_i2c_devclass, NULL, NULL, SI_ORDER_ANY);
|
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/btc_dpm.c 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
* Authors: Alex Deucher
|
||
*/
|
||
#include <drm/drmP.h>
|
||
#include "drmP.h"
|
||
#include "radeon.h"
|
||
#include "radeon_asic.h"
|
||
#include "btcd.h"
|
||
... | ... | |
struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev);
|
||
struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev);
|
||
extern int ni_mc_load_microcode(struct radeon_device *rdev);
|
||
//********* BARTS **************//
|
||
static const u32 barts_cgcg_cgls_default[] =
|
||
{
|
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/cayman_blit_shaders.h 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
#ifndef CAYMAN_BLIT_SHADERS_H
|
||
#define CAYMAN_BLIT_SHADERS_H
|
||
extern const u32 cayman_ps[];
|
||
extern const u32 cayman_vs[];
|
||
extern const u32 cayman_default_state[];
|
||
extern const u32 cayman_ps_size, cayman_vs_size;
|
||
extern const u32 cayman_default_size;
|
||
#endif
|
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/ci_dpm.c 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
*/
|
||
#include <linux/firmware.h>
|
||
#include <drm/drmP.h>
|
||
#include "drmP.h"
|
||
#include "radeon.h"
|
||
#include "radeon_asic.h"
|
||
#include "radeon_ucode.h"
|
||
#include "cikd.h"
|
||
#include "r600_dpm.h"
|
||
#include "ci_dpm.h"
|
||
#include "ni_dpm.h"
|
||
#include "atom.h"
|
||
#include <linux/seq_file.h>
|
||
... | ... | |
{ 0xFFFFFFFF }
|
||
};
|
||
extern u8 rv770_get_memory_module_index(struct radeon_device *rdev);
|
||
extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
|
||
u32 arb_freq_src, u32 arb_freq_dest);
|
||
extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
|
||
extern u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode);
|
||
extern void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev,
|
||
u32 max_voltage_steps,
|
||
struct atom_voltage_table *voltage_table);
|
||
extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev);
|
||
extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev);
|
||
extern int ci_mc_load_microcode(struct radeon_device *rdev);
|
||
extern void cik_update_cg(struct radeon_device *rdev,
|
||
u32 block, bool enable);
|
||
static int ci_get_std_voltage_value_sidd(struct radeon_device *rdev,
|
||
struct atom_voltage_table_entry *voltage_table,
|
||
u16 *std_voltage_hi_sidd, u16 *std_voltage_lo_sidd);
|
||
... | ... | |
/* mclk dpm is unstable on some R7 260X cards with the old mc ucode */
|
||
if ((rdev->pdev->device == 0x6658) &&
|
||
(rdev->mc_fw->datasize == (BONAIRE_MC_UCODE_SIZE * 4))) {
|
||
(rdev->mc_fw->size == (BONAIRE_MC_UCODE_SIZE * 4))) {
|
||
pi->mclk_dpm_key_disabled = 1;
|
||
}
|
||
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/ci_dpm.h 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
void ci_start_smc_clock(struct radeon_device *rdev);
|
||
bool ci_is_smc_running(struct radeon_device *rdev);
|
||
PPSMC_Result ci_send_msg_to_smc(struct radeon_device *rdev, PPSMC_Msg msg);
|
||
PPSMC_Result ci_wait_for_smc_inactive(struct radeon_device *rdev);
|
||
int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit);
|
||
int ci_read_smc_sram_dword(struct radeon_device *rdev,
|
||
u32 smc_address, u32 *value, u32 limit);
|
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/ci_smc.c 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
*/
|
||
#include <linux/firmware.h>
|
||
#include <drm/drmP.h>
|
||
#include "drmP.h"
|
||
#include "radeon.h"
|
||
#include "cikd.h"
|
||
#include "ppsmc.h"
|
||
... | ... | |
ucode_start_address = le32_to_cpu(hdr->ucode_start_addr);
|
||
ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);
|
||
src = (const u8 *)
|
||
((const char *)rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
|
||
(rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
|
||
} else {
|
||
switch (rdev->family) {
|
||
case CHIP_BONAIRE:
|
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/cik.c 2016-10-22 03:07:05.000000000 -0700 | ||
---|---|---|
* Authors: Alex Deucher
|
||
*/
|
||
#include <linux/firmware.h>
|
||
#include <linux/slab.h>
|
||
#include <linux/module.h>
|
||
#include <drm/drmP.h>
|
||
#include "drmP.h"
|
||
#include "radeon.h"
|
||
#include "radeon_asic.h"
|
||
#include "radeon_audio.h"
|
||
... | ... | |
#include "cik_blit_shaders.h"
|
||
#include "radeon_ucode.h"
|
||
#include "clearstate_ci.h"
|
||
#include "radeon_kfd.h"
|
||
MODULE_FIRMWARE("radeon/BONAIRE_pfp.bin");
|
||
MODULE_FIRMWARE("radeon/BONAIRE_me.bin");
|
||
... | ... | |
MODULE_FIRMWARE("radeon/mullins_rlc.bin");
|
||
MODULE_FIRMWARE("radeon/mullins_sdma.bin");
|
||
extern int r600_ih_ring_alloc(struct radeon_device *rdev);
|
||
extern void r600_ih_ring_fini(struct radeon_device *rdev);
|
||
extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save);
|
||
extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save);
|
||
extern bool evergreen_is_display_hung(struct radeon_device *rdev);
|
||
extern void sumo_rlc_fini(struct radeon_device *rdev);
|
||
extern int sumo_rlc_init(struct radeon_device *rdev);
|
||
extern void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
|
||
extern void si_rlc_reset(struct radeon_device *rdev);
|
||
extern void si_init_uvd_internal_cg(struct radeon_device *rdev);
|
||
static u32 cik_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh);
|
||
extern int cik_sdma_resume(struct radeon_device *rdev);
|
||
extern void cik_sdma_enable(struct radeon_device *rdev, bool enable);
|
||
extern void cik_sdma_fini(struct radeon_device *rdev);
|
||
extern void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable);
|
||
static void cik_rlc_stop(struct radeon_device *rdev);
|
||
static void cik_pcie_gen3_enable(struct radeon_device *rdev);
|
||
static void cik_program_aspm(struct radeon_device *rdev);
|
||
... | ... | |
static void cik_fini_cg(struct radeon_device *rdev);
|
||
static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev,
|
||
bool enable);
|
||
/**
|
||
* cik_get_allowed_info_register - fetch the register for the info ioctl
|
||
*
|
||
... | ... | |
regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2);
|
||
new_io_mc_regs = (const __le32 *)
|
||
((const char *)rdev->mc_fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));
|
||
(rdev->mc_fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));
|
||
ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;
|
||
new_fw_data = (const __le32 *)
|
||
((const char *)rdev->mc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
|
||
(rdev->mc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
|
||
} else {
|
||
ucode_size = rdev->mc_fw->datasize / 4;
|
||
ucode_size = rdev->mc_fw->size / 4;
|
||
switch (rdev->family) {
|
||
case CHIP_BONAIRE:
|
||
... | ... | |
DRM_INFO("Loading %s Microcode\n", new_chip_name);
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_pfp", new_chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", new_chip_name);
|
||
err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_pfp", chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", chip_name);
|
||
err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev);
|
||
if (err)
|
||
goto out;
|
||
if (rdev->pfp_fw->datasize != pfp_req_size) {
|
||
if (rdev->pfp_fw->size != pfp_req_size) {
|
||
printk(KERN_ERR
|
||
"cik_cp: Bogus length %zu in firmware \"%s\"\n",
|
||
rdev->pfp_fw->datasize, fw_name);
|
||
rdev->pfp_fw->size, fw_name);
|
||
err = -EINVAL;
|
||
goto out;
|
||
}
|
||
... | ... | |
}
|
||
}
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_me", new_chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_me.bin", new_chip_name);
|
||
err = request_firmware(&rdev->me_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_me", chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_me.bin", chip_name);
|
||
err = request_firmware(&rdev->me_fw, fw_name, rdev->dev);
|
||
if (err)
|
||
goto out;
|
||
if (rdev->me_fw->datasize != me_req_size) {
|
||
if (rdev->me_fw->size != me_req_size) {
|
||
printk(KERN_ERR
|
||
"cik_cp: Bogus length %zu in firmware \"%s\"\n",
|
||
rdev->me_fw->datasize, fw_name);
|
||
rdev->me_fw->size, fw_name);
|
||
err = -EINVAL;
|
||
}
|
||
} else {
|
||
... | ... | |
}
|
||
}
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_ce", new_chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_ce.bin", new_chip_name);
|
||
err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_ce", chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_ce.bin", chip_name);
|
||
err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev);
|
||
if (err)
|
||
goto out;
|
||
if (rdev->ce_fw->datasize != ce_req_size) {
|
||
if (rdev->ce_fw->size != ce_req_size) {
|
||
printk(KERN_ERR
|
||
"cik_cp: Bogus length %zu in firmware \"%s\"\n",
|
||
rdev->ce_fw->datasize, fw_name);
|
||
rdev->ce_fw->size, fw_name);
|
||
err = -EINVAL;
|
||
}
|
||
} else {
|
||
... | ... | |
}
|
||
}
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mec", new_chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_mec.bin", new_chip_name);
|
||
err = request_firmware(&rdev->mec_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mec", chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_mec.bin", chip_name);
|
||
err = request_firmware(&rdev->mec_fw, fw_name, rdev->dev);
|
||
if (err)
|
||
goto out;
|
||
if (rdev->mec_fw->datasize != mec_req_size) {
|
||
if (rdev->mec_fw->size != mec_req_size) {
|
||
printk(KERN_ERR
|
||
"cik_cp: Bogus length %zu in firmware \"%s\"\n",
|
||
rdev->mec_fw->datasize, fw_name);
|
||
rdev->mec_fw->size, fw_name);
|
||
err = -EINVAL;
|
||
}
|
||
} else {
|
||
... | ... | |
}
|
||
if (rdev->family == CHIP_KAVERI) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mec2", new_chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_mec2.bin", new_chip_name);
|
||
err = request_firmware(&rdev->mec2_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
goto out;
|
||
... | ... | |
}
|
||
}
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_rlc", new_chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_rlc.bin", new_chip_name);
|
||
err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_rlc", chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_rlc.bin", chip_name);
|
||
err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev);
|
||
if (err)
|
||
goto out;
|
||
if (rdev->rlc_fw->datasize != rlc_req_size) {
|
||
if (rdev->rlc_fw->size != rlc_req_size) {
|
||
printk(KERN_ERR
|
||
"cik_rlc: Bogus length %zu in firmware \"%s\"\n",
|
||
rdev->rlc_fw->datasize, fw_name);
|
||
rdev->rlc_fw->size, fw_name);
|
||
err = -EINVAL;
|
||
}
|
||
} else {
|
||
... | ... | |
}
|
||
}
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_sdma", new_chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_sdma.bin", new_chip_name);
|
||
err = request_firmware(&rdev->sdma_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_sdma", chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_sdma.bin", chip_name);
|
||
err = request_firmware(&rdev->sdma_fw, fw_name, rdev->dev);
|
||
if (err)
|
||
goto out;
|
||
if (rdev->sdma_fw->datasize != sdma_req_size) {
|
||
if (rdev->sdma_fw->size != sdma_req_size) {
|
||
printk(KERN_ERR
|
||
"cik_sdma: Bogus length %zu in firmware \"%s\"\n",
|
||
rdev->sdma_fw->datasize, fw_name);
|
||
rdev->sdma_fw->size, fw_name);
|
||
err = -EINVAL;
|
||
}
|
||
} else {
|
||
... | ... | |
/* No SMC, MC ucode on APUs */
|
||
if (!(rdev->flags & RADEON_IS_IGP)) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mc", new_chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", new_chip_name);
|
||
err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mc2", chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
|
||
err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mc", chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
|
||
err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
|
||
if (err)
|
||
goto out;
|
||
}
|
||
if ((rdev->mc_fw->datasize != mc_req_size) &&
|
||
(rdev->mc_fw->datasize != mc2_req_size)){
|
||
if ((rdev->mc_fw->size != mc_req_size) &&
|
||
(rdev->mc_fw->size != mc2_req_size)){
|
||
printk(KERN_ERR
|
||
"cik_mc: Bogus length %zu in firmware \"%s\"\n",
|
||
rdev->mc_fw->datasize, fw_name);
|
||
rdev->mc_fw->size, fw_name);
|
||
err = -EINVAL;
|
||
}
|
||
DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->datasize);
|
||
DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
|
||
} else {
|
||
err = radeon_ucode_validate(rdev->mc_fw);
|
||
if (err) {
|
||
... | ... | |
}
|
||
}
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_smc", new_chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", new_chip_name);
|
||
err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_smc", chip_name);
|
||
snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
|
||
err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
|
||
if (err) {
|
||
printk(KERN_ERR
|
||
... | ... | |
release_firmware(rdev->smc_fw);
|
||
rdev->smc_fw = NULL;
|
||
err = 0;
|
||
} else if (rdev->smc_fw->datasize != smc_req_size) {
|
||
} else if (rdev->smc_fw->size != smc_req_size) {
|
||
printk(KERN_ERR
|
||
"cik_smc: Bogus length %zu in firmware \"%s\"\n",
|
||
rdev->smc_fw->datasize, fw_name);
|
||
rdev->smc_fw->size, fw_name);
|
||
err = -EINVAL;
|
||
}
|
||
} else {
|
||
... | ... | |
return err;
|
||
}
|
||
/**
|
||
* cik_fini_microcode - drop the firmwares image references
|
||
*
|
||
* @rdev: radeon_device pointer
|
||
*
|
||
* Drop the pfp, me, mec, mec2, rlc, sdma, mc, smc and ce firmware image references.
|
||
* Called at driver shutdown.
|
||
*/
|
||
static void cik_fini_microcode(struct radeon_device *rdev)
|
||
{
|
||
release_firmware(rdev->pfp_fw);
|
||
rdev->pfp_fw = NULL;
|
||
release_firmware(rdev->me_fw);
|
||
rdev->me_fw = NULL;
|
||
release_firmware(rdev->ce_fw);
|
||
rdev->ce_fw = NULL;
|
||
release_firmware(rdev->mec_fw);
|
||
rdev->mec_fw = NULL;
|
||
release_firmware(rdev->mec2_fw);
|
||
rdev->mec2_fw = NULL;
|
||
release_firmware(rdev->rlc_fw);
|
||
rdev->rlc_fw = NULL;
|
||
release_firmware(rdev->sdma_fw);
|
||
rdev->sdma_fw = NULL;
|
||
release_firmware(rdev->mc_fw);
|
||
rdev->mc_fw = NULL;
|
||
release_firmware(rdev->smc_fw);
|
||
rdev->smc_fw = NULL;
|
||
}
|
||
/*
|
||
* Core functions
|
||
*/
|
||
... | ... | |
* @src_offset: src GPU address
|
||
* @dst_offset: dst GPU address
|
||
* @num_gpu_pages: number of GPU pages to xfer
|
||
* @fence: radeon fence object
|
||
* @resv: reservation object to sync to
|
||
*
|
||
* Copy GPU paging using the CP DMA engine (CIK+).
|
||
* Used by the radeon ttm implementation to move pages if
|
||
* registered as the asic copy callback.
|
||
*/
|
||
int cik_copy_cpdma(struct radeon_device *rdev,
|
||
struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev,
|
||
uint64_t src_offset, uint64_t dst_offset,
|
||
unsigned num_gpu_pages,
|
||
struct radeon_fence **fence)
|
||
struct reservation_object *resv)
|
||
{
|
||
struct radeon_semaphore *sem = NULL;
|
||
struct radeon_fence *fence;
|
||
struct radeon_sync sync;
|
||
int ring_index = rdev->asic->copy.blit_ring_index;
|
||
struct radeon_ring *ring = &rdev->ring[ring_index];
|
||
u32 size_in_bytes, cur_size_in_bytes, control;
|
||
int i, num_loops;
|
||
int r = 0;
|
||
r = radeon_semaphore_create(rdev, &sem);
|
||
if (r) {
|
||
DRM_ERROR("radeon: moving bo (%d).\n", r);
|
||
return r;
|
||
}
|
||
radeon_sync_create(&sync);
|
||
size_in_bytes = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT);
|
||
num_loops = DIV_ROUND_UP(size_in_bytes, 0x1fffff);
|
||
r = radeon_ring_lock(rdev, ring, num_loops * 7 + 18);
|
||
if (r) {
|
||
DRM_ERROR("radeon: moving bo (%d).\n", r);
|
||
radeon_semaphore_free(rdev, &sem, NULL);
|
||
return r;
|
||
radeon_sync_free(rdev, &sync, NULL);
|
||
return ERR_PTR(r);
|
||
}
|
||
radeon_semaphore_sync_to(sem, *fence);
|
||
radeon_semaphore_sync_rings(rdev, sem, ring->idx);
|
||
radeon_sync_resv(rdev, &sync, resv, false);
|
||
radeon_sync_rings(rdev, &sync, ring->idx);
|
||
for (i = 0; i < num_loops; i++) {
|
||
cur_size_in_bytes = size_in_bytes;
|
||
... | ... | |
dst_offset += cur_size_in_bytes;
|
||
}
|
||
r = radeon_fence_emit(rdev, fence, ring->idx);
|
||
r = radeon_fence_emit(rdev, &fence, ring->idx);
|
||
if (r) {
|
||
radeon_ring_unlock_undo(rdev, ring);
|
||
radeon_semaphore_free(rdev, &sem, NULL);
|
||
return r;
|
||
radeon_sync_free(rdev, &sync, NULL);
|
||
return ERR_PTR(r);
|
||
}
|
||
radeon_ring_unlock_commit(rdev, ring, false);
|