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radeon_4_07.diff

davshao, 04/26/2017 08:59 PM

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/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/Makefile 2016-10-22 03:07:05.000000000 -0700
1 1
#
2
# Makefile for the drm device(radeonkms) driver.
3
#
4
# Please keep SRC list structured in blocks and sorted.
5
#
2
# Makefile for the drm device driver.  This driver provides support for the
3
# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
4

  
5
ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/amd/include
6

  
7
hostprogs-y := mkregtable
8
clean-files := rn50_reg_safe.h r100_reg_safe.h r200_reg_safe.h rv515_reg_safe.h r300_reg_safe.h r420_reg_safe.h rs600_reg_safe.h r600_reg_safe.h evergreen_reg_safe.h cayman_reg_safe.h
9

  
10
quiet_cmd_mkregtable = MKREGTABLE $@
11
      cmd_mkregtable = $(obj)/mkregtable $< > $@
12

  
13
$(obj)/rn50_reg_safe.h: $(src)/reg_srcs/rn50 $(obj)/mkregtable
14
	$(call if_changed,mkregtable)
15

  
16
$(obj)/r100_reg_safe.h: $(src)/reg_srcs/r100 $(obj)/mkregtable
17
	$(call if_changed,mkregtable)
18

  
19
$(obj)/r200_reg_safe.h: $(src)/reg_srcs/r200 $(obj)/mkregtable
20
	$(call if_changed,mkregtable)
21

  
22
$(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable
23
	$(call if_changed,mkregtable)
24

  
25
$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable
26
	$(call if_changed,mkregtable)
27

  
28
$(obj)/r420_reg_safe.h: $(src)/reg_srcs/r420 $(obj)/mkregtable
29
	$(call if_changed,mkregtable)
30

  
31
$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable
32
	$(call if_changed,mkregtable)
33

  
34
$(obj)/r600_reg_safe.h: $(src)/reg_srcs/r600 $(obj)/mkregtable
35
	$(call if_changed,mkregtable)
36

  
37
$(obj)/evergreen_reg_safe.h: $(src)/reg_srcs/evergreen $(obj)/mkregtable
38
	$(call if_changed,mkregtable)
39

  
40
$(obj)/cayman_reg_safe.h: $(src)/reg_srcs/cayman $(obj)/mkregtable
41
	$(call if_changed,mkregtable)
42

  
43
$(obj)/r100.o: $(obj)/r100_reg_safe.h $(obj)/rn50_reg_safe.h
44

  
45
$(obj)/r200.o: $(obj)/r200_reg_safe.h
46

  
47
$(obj)/rv515.o: $(obj)/rv515_reg_safe.h
48

  
49
$(obj)/r300.o: $(obj)/r300_reg_safe.h
50

  
51
$(obj)/r420.o: $(obj)/r420_reg_safe.h
52

  
53
$(obj)/rs600.o: $(obj)/rs600_reg_safe.h
54

  
55
$(obj)/r600_cs.o: $(obj)/r600_reg_safe.h
56

  
57
$(obj)/evergreen_cs.o: $(obj)/evergreen_reg_safe.h $(obj)/cayman_reg_safe.h
58

  
59
radeon-y := radeon_drv.o
60

  
61
# add KMS driver
62
radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
63
	radeon_atombios.o radeon_agp.o atombios_crtc.o radeon_combios.o \
64
	atom.o radeon_fence.o radeon_ttm.o radeon_object.o radeon_gart.o \
65
	radeon_legacy_crtc.o radeon_legacy_encoders.o radeon_connectors.o \
66
	radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \
67
	radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \
68
	radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
69
	rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
70
	r200.o radeon_legacy_tv.o r600_cs.o r600_blit_shaders.o \
71
	radeon_pm.o atombios_dp.o r600_hdmi.o dce3_1_afmt.o \
72
	evergreen.o evergreen_cs.o evergreen_blit_shaders.o \
73
	evergreen_hdmi.o radeon_trace_points.o ni.o cayman_blit_shaders.o \
74
	atombios_encoders.o radeon_semaphore.o radeon_sa.o atombios_i2c.o si.o \
75
	si_blit_shaders.o radeon_prime.o cik.o cik_blit_shaders.o \
76
	r600_dpm.o rs780_dpm.o rv6xx_dpm.o rv770_dpm.o rv730_dpm.o rv740_dpm.o \
77
	rv770_smc.o cypress_dpm.o btc_dpm.o sumo_dpm.o sumo_smc.o trinity_dpm.o \
78
	trinity_smc.o ni_dpm.o si_smc.o si_dpm.o kv_smc.o kv_dpm.o ci_smc.o \
79
	ci_dpm.o dce6_afmt.o radeon_vm.o radeon_ucode.o radeon_ib.o \
80
	radeon_sync.o radeon_audio.o radeon_dp_auxch.o radeon_dp_mst.o
81

  
82
radeon-$(CONFIG_MMU_NOTIFIER) += radeon_mn.o
6 83

  
84
# add async DMA block
85
radeon-y += \
86
	r600_dma.o \
87
	rv770_dma.o \
88
	evergreen_dma.o \
89
	ni_dma.o \
90
	si_dma.o \
91
	cik_sdma.o \
7 92

  
8
KMOD	= radeonkms
9
SRCS	=								\
10
	rn50_reg_safe.h							\
11
	r100_reg_safe.h							\
12
	r200_reg_safe.h							\
13
	rv515_reg_safe.h						\
14
	r300_reg_safe.h							\
15
	r420_reg_safe.h							\
16
	rs600_reg_safe.h						\
17
	r600_reg_safe.h							\
18
	evergreen_reg_safe.h						\
19
	cayman_reg_safe.h
20
SRCS	+=								\
21
	radeon_acpi.c							\
22
	radeon_agp.c							\
23
	radeon_asic.c							\
24
	radeon_atombios.c						\
25
	radeon_audio.c						\
26
	radeon_benchmark.c						\
27
	radeon_bios.c							\
28
	radeon_clocks.c							\
29
	radeon_combios.c						\
30
	radeon_connectors.c						\
31
	radeon_cs.c							\
32
	radeon_cursor.c							\
33
	radeon_device.c							\
34
	radeon_display.c						\
35
	radeon_dp_auxch.c						\
36
	radeon_drv.c							\
37
	radeon_encoders.c						\
38
	radeon_fb.c							\
39
	radeon_fence.c							\
40
	radeon_gart.c							\
41
	radeon_gem.c							\
42
	radeon_i2c.c							\
43
	radeon_ib.c							\
44
	radeon_irq_kms.c						\
45
	radeon_kms.c							\
46
	radeon_legacy_crtc.c						\
47
	radeon_legacy_encoders.c					\
48
	radeon_legacy_tv.c						\
49
	radeon_object.c							\
50
	radeon_pm.c							\
51
	radeon_ring.c							\
52
	radeon_sa.c							\
53
	radeon_semaphore.c						\
54
	radeon_test.c							\
55
	radeon_ttm.c							\
56
	radeon_ucode.c							\
57
	radeon_vm.c							\
58
	atom.c								\
59
	atombios_crtc.c							\
60
	atombios_dp.c							\
61
	atombios_encoders.c						\
62
	atombios_i2c.c							\
63
	r100.c								\
64
	r200.c								\
65
	r300.c								\
66
	r420.c								\
67
	rs400.c								\
68
	rs600.c								\
69
	rs690.c								\
70
	rv515.c								\
71
	r520.c								\
72
	r600.c								\
73
	r600_blit_shaders.c						\
74
	r600_cs.c							\
75
	r600_hdmi.c							\
76
	rv770.c								\
77
	dce3_1_afmt.c							\
78
	evergreen.c							\
79
	evergreen_blit_shaders.c					\
80
	evergreen_cs.c							\
81
	evergreen_hdmi.c						\
82
	cayman_blit_shaders.c						\
83
	ni.c								\
84
	si.c								\
85
	si_blit_shaders.c						\
86
	cik.c								\
87
	cik_blit_shaders.c						\
88
	r600_dpm.c							\
89
	rs780_dpm.c							\
90
	rv6xx_dpm.c							\
91
	rv770_dpm.c							\
92
	rv730_dpm.c							\
93
	rv740_dpm.c							\
94
	rv770_smc.c							\
95
	cypress_dpm.c							\
96
	btc_dpm.c							\
97
	sumo_dpm.c							\
98
	sumo_smc.c							\
99
	trinity_dpm.c							\
100
	trinity_smc.c							\
101
	ni_dpm.c							\
102
	si_smc.c							\
103
	si_dpm.c							\
104
	kv_smc.c							\
105
	kv_dpm.c							\
106
	ci_smc.c							\
107
	ci_dpm.c							\
108
	dce6_afmt.c
109

  
110
# async DMA block
111
SRCS	+=								\
112
	r600_dma.c							\
113
	rv770_dma.c							\
114
	evergreen_dma.c							\
115
	ni_dma.c							\
116
	si_dma.c							\
117
	cik_sdma.c
118

  
119
# UVD block
120
SRCS	+=								\
121
	radeon_uvd.c							\
122
	uvd_v1_0.c							\
123
	uvd_v2_2.c							\
124
	uvd_v3_1.c							\
125
	uvd_v4_2.c
93
# add UVD block
94
radeon-y += \
95
	radeon_uvd.o \
96
	uvd_v1_0.o \
97
	uvd_v2_2.o \
98
	uvd_v3_1.o \
99
	uvd_v4_2.o
126 100

  
127 101
# add VCE block
128
SRCS	+=								\
129
	radeon_vce.c							\
130
	vce_v1_0.c							\
131
	vce_v2_0.c
132

  
133
#radeon_ioc32.c
134
#radeon_prime.c
135
#--radeon_trace_points.c
136

  
137
SRCS	+=								\
138
	opt_acpi.h							\
139
	opt_drm.h							\
140
	opt_ktr.h							\
141
	acpi_if.h							\
142
	bus_if.h							\
143
	device_if.h							\
144
	iicbb_if.h							\
145
	iicbus_if.h							\
146
	pci_if.h
102
radeon-y += \
103
	radeon_vce.o \
104
	vce_v1_0.o \
105
	vce_v2_0.o \
106
	radeon_kfd.o
107

  
108
radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
109
radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o
110
radeon-$(CONFIG_ACPI) += radeon_acpi.o
147 111

  
148
KCFLAGS+= -I${SYSDIR}/dev/drm/include
149
KCFLAGS+= -I${SYSDIR}/contrib/dev/acpica/source/include
112
obj-$(CONFIG_DRM_RADEON)+= radeon.o
150 113

  
151
.include <bsd.kmod.mk>
114
CFLAGS_radeon_trace_points.o := -I$(src)
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atom.c 2016-10-22 03:07:05.000000000 -0700
24 24

  
25 25
#include <linux/module.h>
26 26
#include <linux/sched.h>
27
#include <linux/slab.h>
27 28
#include <asm/unaligned.h>
28 29

  
29 30
#define ATOM_DEBUG
......
32 33
#include "atom-names.h"
33 34
#include "atom-bits.h"
34 35
#include "radeon.h"
35
#include <linux/delay.h>
36 36

  
37 37
#define ATOM_COND_ABOVE		0
38 38
#define ATOM_COND_ABOVEOREQUAL	1
......
64 64

  
65 65
int atom_debug = 0;
66 66
static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
67
int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
67 68

  
68 69
static uint32_t atom_arg_mask[8] = {
69 70
	0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
......
89 90
static void debug_print_spaces(int n)
90 91
{
91 92
	while (n--)
92
		kprintf("   ");
93
		printk("   ");
93 94
}
94 95

  
95
#ifdef DEBUG
96
#undef DEBUG
97
#endif
98
#ifdef SDEBUG
99
#undef SDEBUG
100
#endif
101

  
102
#define DEBUG(...) do if (atom_debug) { kprintf(__FILE__ __VA_ARGS__); } while (0)
103
#define SDEBUG(...) do if (atom_debug) { kprintf(__FILE__); debug_print_spaces(debug_depth); kprintf(__VA_ARGS__); } while (0)
104

  
105
#else /* !ATOM_DEBUG */
106

  
96
#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
97
#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
98
#else
107 99
#define DEBUG(...) do { } while (0)
108 100
#define SDEBUG(...) do { } while (0)
109

  
110
#endif /* ATOM_DEBUG */
101
#endif
111 102

  
112 103
static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
113 104
				 uint32_t index, uint32_t data)
......
179 170
		case ATOM_IIO_END:
180 171
			return temp;
181 172
		default:
182
			DRM_INFO("Unknown IIO opcode.\n");
173
			printk(KERN_INFO "Unknown IIO opcode.\n");
183 174
			return 0;
184 175
		}
185 176
}
......
191 182
	struct atom_context *gctx = ctx->ctx;
192 183
	arg = attr & 7;
193 184
	align = (attr >> 3) & 7;
194

  
195
	if (saved)
196
		*saved = 0;	/* avoid bogus gcc warning */
197

  
198 185
	switch (arg) {
199 186
	case ATOM_ARG_REG:
200 187
		idx = U16(*ptr);
......
207 194
			val = gctx->card->reg_read(gctx->card, idx);
208 195
			break;
209 196
		case ATOM_IO_PCI:
210
			DRM_INFO(
197
			printk(KERN_INFO
211 198
			       "PCI registers are not implemented.\n");
212 199
			return 0;
213 200
		case ATOM_IO_SYSIO:
214
			DRM_INFO(
201
			printk(KERN_INFO
215 202
			       "SYSIO registers are not implemented.\n");
216 203
			return 0;
217 204
		default:
218 205
			if (!(gctx->io_mode & 0x80)) {
219
				DRM_INFO("Bad IO mode.\n");
206
				printk(KERN_INFO "Bad IO mode.\n");
220 207
				return 0;
221 208
			}
222 209
			if (!gctx->iio[gctx->io_mode & 0x7F]) {
223
				DRM_INFO(
210
				printk(KERN_INFO
224 211
				       "Undefined indirect IO read method %d.\n",
225 212
				       gctx->io_mode & 0x7F);
226 213
				return 0;
......
486 473
				gctx->card->reg_write(gctx->card, idx, val);
487 474
			break;
488 475
		case ATOM_IO_PCI:
489
			DRM_INFO(
476
			printk(KERN_INFO
490 477
			       "PCI registers are not implemented.\n");
491 478
			return;
492 479
		case ATOM_IO_SYSIO:
493
			DRM_INFO(
480
			printk(KERN_INFO
494 481
			       "SYSIO registers are not implemented.\n");
495 482
			return;
496 483
		default:
497 484
			if (!(gctx->io_mode & 0x80)) {
498
				DRM_INFO("Bad IO mode.\n");
485
				printk(KERN_INFO "Bad IO mode.\n");
499 486
				return;
500 487
			}
501 488
			if (!gctx->iio[gctx->io_mode & 0xFF]) {
502
				DRM_INFO(
489
				printk(KERN_INFO
503 490
				       "Undefined indirect IO write method %d.\n",
504 491
				       gctx->io_mode & 0x7F);
505 492
				return;
......
628 615

  
629 616
static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
630 617
{
631
	DRM_INFO("ATOM BIOS beeped!\n");
618
	printk("ATOM BIOS beeped!\n");
632 619
}
633 620

  
634 621
static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
......
832 819

  
833 820
static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
834 821
{
835
	DRM_INFO("unimplemented!\n");
822
	printk(KERN_INFO "unimplemented!\n");
836 823
}
837 824

  
838 825
static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
839 826
{
840
	DRM_INFO("unimplemented!\n");
827
	printk(KERN_INFO "unimplemented!\n");
841 828
}
842 829

  
843 830
static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
844 831
{
845
	DRM_INFO("unimplemented!\n");
832
	printk(KERN_INFO "unimplemented!\n");
846 833
}
847 834

  
848 835
static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
......
1005 992
			}
1006 993
			(*ptr) += 2;
1007 994
		} else {
1008
			DRM_INFO("Bad case.\n");
995
			printk(KERN_INFO "Bad case.\n");
1009 996
			return;
1010 997
		}
1011 998
	(*ptr) += 2;
......
1039 1026

  
1040 1027
static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1041 1028
{
1042
	DRM_INFO("unimplemented!\n");
1029
	printk(KERN_INFO "unimplemented!\n");
1043 1030
}
1044 1031

  
1045 1032
static struct {
......
1293 1280
	ctx->bios = bios;
1294 1281

  
1295 1282
	if (CU16(0) != ATOM_BIOS_MAGIC) {
1296
		DRM_INFO("Invalid BIOS magic.\n");
1283
		printk(KERN_INFO "Invalid BIOS magic.\n");
1297 1284
		kfree(ctx);
1298 1285
		return NULL;
1299 1286
	}
1300 1287
	if (strncmp
1301 1288
	    (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1302 1289
	     strlen(ATOM_ATI_MAGIC))) {
1303
		DRM_INFO("Invalid ATI magic.\n");
1290
		printk(KERN_INFO "Invalid ATI magic.\n");
1304 1291
		kfree(ctx);
1305 1292
		return NULL;
1306 1293
	}
......
1309 1296
	if (strncmp
1310 1297
	    (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1311 1298
	     strlen(ATOM_ROM_MAGIC))) {
1312
		DRM_INFO("Invalid ATOM magic.\n");
1299
		printk(KERN_INFO "Invalid ATOM magic.\n");
1313 1300
		kfree(ctx);
1314 1301
		return NULL;
1315 1302
	}
......
1333 1320
			break;
1334 1321
		}
1335 1322
	}
1336
	DRM_INFO("ATOM BIOS: %s\n", name);
1323
	printk(KERN_INFO "ATOM BIOS: %s\n", name);
1337 1324

  
1338 1325
	return ctx;
1339 1326
}
......
1379 1366
{
1380 1367
	int offset = index * 2 + 4;
1381 1368
	int idx = CU16(ctx->data_table + offset);
1382
	u16 *mdt = (u16 *)((char *)ctx->bios + ctx->data_table + 4);
1369
	u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1383 1370

  
1384 1371
	if (!mdt[index])
1385 1372
		return false;
......
1399 1386
{
1400 1387
	int offset = index * 2 + 4;
1401 1388
	int idx = CU16(ctx->cmd_table + offset);
1402
	u16 *mct = (u16 *)((char *)ctx->bios + ctx->cmd_table + 4);
1389
	u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1403 1390

  
1404 1391
	if (!mct[index])
1405 1392
		return false;
......
1419 1406
	struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1420 1407

  
1421 1408
	if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1422
		firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)((char *)ctx->bios + data_offset);
1409
		firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1423 1410

  
1424 1411
		DRM_DEBUG("atom firmware requested %08x %dkb\n",
1425 1412
			  le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atom.h 2016-10-22 03:07:05.000000000 -0700
25 25
#ifndef ATOM_H
26 26
#define ATOM_H
27 27

  
28
#include <linux/types.h>
28 29
#include <drm/drmP.h>
29 30

  
30 31
#define ATOM_BIOS_MAGIC		0xAA55
......
123 124

  
124 125
struct atom_context {
125 126
	struct card_info *card;
126
	struct lock mutex;
127
	struct lock scratch_mutex;
128
	uint8_t *bios;
127
	struct mutex mutex;
128
	struct mutex scratch_mutex;
129
	void *bios;
129 130
	uint32_t cmd_table, data_table;
130 131
	uint16_t *iio;
131 132

  
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios.h 2016-10-22 03:07:05.000000000 -0700
7978 7978
#endif /* _ATOMBIOS_H */
7979 7979

  
7980 7980
#include "pptable.h"
7981

  
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios_crtc.c 2016-10-22 03:07:05.000000000 -0700
26 26
#include <drm/drmP.h>
27 27
#include <drm/drm_crtc_helper.h>
28 28
#include <drm/drm_fb_helper.h>
29
#include <uapi_drm/radeon_drm.h>
29
#include <drm/radeon_drm.h>
30 30
#include <drm/drm_fixed.h>
31 31
#include "radeon.h"
32 32
#include "atom.h"
......
614 614
		}
615 615
	}
616 616

  
617
	if (radeon_encoder->is_mst_encoder) {
618
		struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
619
		struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
620

  
621
		dp_clock = dig_connector->dp_clock;
622
	}
623

  
617 624
	/* use recommended ref_div for ss */
618 625
	if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
619 626
		if (radeon_crtc->ss_enabled) {
......
962 969
	radeon_crtc->bpc = 8;
963 970
	radeon_crtc->ss_enabled = false;
964 971

  
965
	if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||
972
	if (radeon_encoder->is_mst_encoder) {
973
		radeon_dp_mst_prepare_pll(crtc, mode);
974
	} else if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||
966 975
	    (radeon_encoder_get_dp_bridge_encoder_id(radeon_crtc->encoder) != ENCODER_OBJECT_ID_NONE)) {
967 976
		struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
968 977
		struct drm_connector *connector =
......
1175 1184
	if (atomic)
1176 1185
		fb_location = radeon_bo_gpu_offset(rbo);
1177 1186
	else {
1178
		r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, (u64 *)&fb_location);
1187
		r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
1179 1188
		if (unlikely(r != 0)) {
1180 1189
			radeon_bo_unreserve(rbo);
1181 1190
			return -EINVAL;
......
1490 1499
	if (atomic)
1491 1500
		fb_location = radeon_bo_gpu_offset(rbo);
1492 1501
	else {
1493
		r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, (u64 *)&fb_location);
1502
		r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
1494 1503
		if (unlikely(r != 0)) {
1495 1504
			radeon_bo_unreserve(rbo);
1496 1505
			return -EINVAL;
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios_dp.c 2016-10-22 03:07:05.000000000 -0700
25 25
 *          Jerome Glisse
26 26
 */
27 27
#include <drm/drmP.h>
28
#include <uapi_drm/radeon_drm.h>
28
#include <drm/radeon_drm.h>
29 29
#include "radeon.h"
30 30

  
31 31
#include "atom.h"
......
377 377
		return;
378 378

  
379 379
	if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3)
380
		DRM_DEBUG_KMS("Sink OUI: %02hhx%02hhx%02hhx\n",
380
		DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",
381 381
			      buf[0], buf[1], buf[2]);
382 382

  
383 383
	if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3)
384
		DRM_DEBUG_KMS("Branch OUI: %02hhx%02hhx%02hhx\n",
384
		DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",
385 385
			      buf[0], buf[1], buf[2]);
386 386
}
387 387

  
......
391 391
	u8 msg[DP_DPCD_SIZE];
392 392
	int ret, i;
393 393

  
394
	char dpcd_hex_dump[DP_DPCD_SIZE * 3];
395

  
396 394
	for (i = 0; i < 7; i++) {
397 395
		ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg,
398 396
				       DP_DPCD_SIZE);
399 397
		if (ret == DP_DPCD_SIZE) {
400 398
			memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);
401
			DRM_DEBUG_KMS("DPCD: %s\n", hexncpy(dig_connector->dpcd,
402
				      sizeof(dig_connector->dpcd),
403
				      dpcd_hex_dump, sizeof(dpcd_hex_dump), " "));
399

  
400
			DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd),
401
				      dig_connector->dpcd);
404 402

  
405 403
			radeon_dp_probe_oui(radeon_connector);
406 404

  
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios_encoders.c 2016-10-22 03:07:05.000000000 -0700
25 25
 */
26 26
#include <drm/drmP.h>
27 27
#include <drm/drm_crtc_helper.h>
28
#include <uapi_drm/radeon_drm.h>
28
#include <drm/radeon_drm.h>
29 29
#include "radeon.h"
30 30
#include "radeon_audio.h"
31
#include "radeon_asic.h"
32 31
#include "atom.h"
32
#include <linux/backlight.h>
33

  
34
extern int atom_debug;
33 35

  
34 36
static u8
35 37
radeon_atom_get_backlight_level_from_reg(struct radeon_device *rdev)
......
201 203
	if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU))
202 204
		return;
203 205

  
204
	pdata = kmalloc(sizeof(struct radeon_backlight_privdata),
205
			M_DRM, M_WAITOK);
206
	pdata = kmalloc(sizeof(struct radeon_backlight_privdata), GFP_KERNEL);
206 207
	if (!pdata) {
207 208
		DRM_ERROR("Memory allocation failed\n");
208 209
		goto error;
......
279 280

  
280 281
#else /* !CONFIG_BACKLIGHT_CLASS_DEVICE */
281 282

  
282
/*
283
 * Read max backlight level
284
 */
285
static int
286
sysctl_backlight_max(SYSCTL_HANDLER_ARGS)
287
{
288
	int err, val;
289

  
290
	val = RADEON_MAX_BL_LEVEL;
291
	err = sysctl_handle_int(oidp, &val, 0, req);
292
	return(err);
293
}
294

  
295
/*
296
 * Read/write backlight level
297
 */
298
static int
299
sysctl_backlight_handler(SYSCTL_HANDLER_ARGS)
283
void radeon_atom_backlight_init(struct radeon_encoder *encoder)
300 284
{
301
	struct radeon_encoder *encoder;
302
	struct radeon_encoder_atom_dig *dig;
303
	int err, val;
304

  
305
	encoder = (struct radeon_encoder *)arg1;
306
	dig = encoder->enc_priv;
307
	val = dig->backlight_level;
308

  
309
	err = sysctl_handle_int(oidp, &val, 0, req);
310
	if (err != 0 || req->newptr == NULL) {
311
		return(err);
312
	}
313
	if (dig->backlight_level != val && val >= 0 &&
314
	    val <= RADEON_MAX_BL_LEVEL) {
315
		atombios_set_backlight_level(encoder, val);
316
	}
317

  
318
	return(err);
319
}
320

  
321
void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder,
322
				struct drm_connector *drm_connector)
323
{
324
	struct drm_device *dev = radeon_encoder->base.dev;
325
	struct radeon_device *rdev = dev->dev_private;
326
	struct radeon_encoder_atom_dig *dig;
327

  
328
	if (!radeon_encoder->enc_priv)
329
		return;
330

  
331
	if (!rdev->is_atom_bios)
332
		return;
333

  
334
	if (!(rdev->mode_info.firmware_flags & ATOM_BIOS_INFO_BL_CONTROLLED_BY_GPU))
335
		return;
336

  
337
	dig = radeon_encoder->enc_priv;
338
	dig->backlight_level = radeon_atom_get_backlight_level_from_reg(rdev);
339

  
340
	DRM_INFO("radeon atom DIG backlight initialized\n");
341
	rdev->mode_info.bl_encoder = radeon_encoder;
342

  
343
	SYSCTL_ADD_PROC(&drm_connector->dev->sysctl->ctx, &sysctl__hw_children,
344
			OID_AUTO, "backlight_max",
345
			CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_ANYBODY,
346
			radeon_encoder, sizeof(int),
347
			sysctl_backlight_max,
348
			"I", "Max backlight level");
349
	SYSCTL_ADD_PROC(&drm_connector->dev->sysctl->ctx, &sysctl__hw_children,
350
			OID_AUTO, "backlight_level",
351
			CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_ANYBODY,
352
			radeon_encoder, sizeof(int),
353
			sysctl_backlight_handler,
354
			"I", "Backlight level");
355
	return;
356 285
}
357 286

  
358 287
static void radeon_atom_backlight_exit(struct radeon_encoder *encoder)
......
361 290

  
362 291
#endif
363 292

  
293
/* evil but including atombios.h is much worse */
294
bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
295
				struct drm_display_mode *mode);
364 296

  
365 297
static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
366 298
				   const struct drm_display_mode *mode,
......
745 677
	struct drm_connector *connector;
746 678
	struct radeon_connector *radeon_connector;
747 679
	struct radeon_connector_atom_dig *dig_connector;
680
	struct radeon_encoder_atom_dig *dig_enc;
748 681

  
682
	if (radeon_encoder_is_digital(encoder)) {
683
		dig_enc = radeon_encoder->enc_priv;
684
		if (dig_enc->active_mst_links)
685
			return ATOM_ENCODER_MODE_DP_MST;
686
	}
687
	if (radeon_encoder->is_mst_encoder || radeon_encoder->offset)
688
		return ATOM_ENCODER_MODE_DP_MST;
749 689
	/* dp bridges are always DP */
750 690
	if (radeon_encoder_get_dp_bridge_encoder_id(encoder) != ENCODER_OBJECT_ID_NONE)
751 691
		return ATOM_ENCODER_MODE_DP;
......
1792 1732
	case DRM_MODE_DPMS_STANDBY:
1793 1733
	case DRM_MODE_DPMS_SUSPEND:
1794 1734
	case DRM_MODE_DPMS_OFF:
1735

  
1736
		/* don't power off encoders with active MST links */
1737
		if (dig->active_mst_links)
1738
			return;
1739

  
1795 1740
		if (ASIC_IS_DCE4(rdev)) {
1796 1741
			if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector)
1797 1742
				atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
......
2058 2003
	radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
2059 2004
}
2060 2005

  
2006
void
2007
atombios_set_mst_encoder_crtc_source(struct drm_encoder *encoder, int fe)
2008
{
2009
	struct drm_device *dev = encoder->dev;
2010
	struct radeon_device *rdev = dev->dev_private;
2011
	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
2012
	int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source);
2013
	uint8_t frev, crev;
2014
	union crtc_source_param args;
2015

  
2016
	memset(&args, 0, sizeof(args));
2017

  
2018
	if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
2019
		return;
2020

  
2021
	if (frev != 1 && crev != 2)
2022
		DRM_ERROR("Unknown table for MST %d, %d\n", frev, crev);
2023

  
2024
	args.v2.ucCRTC = radeon_crtc->crtc_id;
2025
	args.v2.ucEncodeMode = ATOM_ENCODER_MODE_DP_MST;
2026

  
2027
	switch (fe) {
2028
	case 0:
2029
		args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
2030
		break;
2031
	case 1:
2032
		args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
2033
		break;
2034
	case 2:
2035
		args.v2.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID;
2036
		break;
2037
	case 3:
2038
		args.v2.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID;
2039
		break;
2040
	case 4:
2041
		args.v2.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID;
2042
		break;
2043
	case 5:
2044
		args.v2.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID;
2045
		break;
2046
	case 6:
2047
		args.v2.ucEncoderID = ASIC_INT_DIG7_ENCODER_ID;
2048
		break;
2049
	}
2050
	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
2051
}
2052

  
2061 2053
static void
2062 2054
atombios_apply_encoder_quirks(struct drm_encoder *encoder,
2063 2055
			      struct drm_display_mode *mode)
......
2638 2630

  
2639 2631
}
2640 2632

  
2641
static bool radeon_atom_ext_mode_fixup(struct drm_encoder *encoder,
2642
				       const struct drm_display_mode *mode,
2643
				       struct drm_display_mode *adjusted_mode)
2644
{
2645
	return true;
2646
}
2647

  
2648 2633
static const struct drm_encoder_helper_funcs radeon_atom_ext_helper_funcs = {
2649 2634
	.dpms = radeon_atom_ext_dpms,
2650
	.mode_fixup = radeon_atom_ext_mode_fixup,
2651 2635
	.prepare = radeon_atom_ext_prepare,
2652 2636
	.mode_set = radeon_atom_ext_mode_set,
2653 2637
	.commit = radeon_atom_ext_commit,
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/atombios_i2c.c 2016-10-22 03:07:05.000000000 -0700
21 21
 *
22 22
 * Authors: Alex Deucher
23 23
 *
24
 * $FreeBSD: head/sys/dev/drm2/radeon/atombios_i2c.c 254885 2013-08-25 19:37:15Z dumbbell $
25 24
 */
26

  
27 25
#include <drm/drmP.h>
28
#include <uapi_drm/radeon_drm.h>
29
#include <bus/iicbus/iic.h>
30
#include <bus/iicbus/iiconf.h>
31
#include <bus/iicbus/iicbus.h>
26
#include <drm/radeon_drm.h>
32 27
#include "radeon.h"
33 28
#include "atom.h"
34
#include "iicbus_if.h"
35
#include "iicbb_if.h"
36 29

  
37 30
#define TARGET_HW_I2C_CLOCK 50
38 31

  
......
40 33
#define ATOM_MAX_HW_I2C_WRITE 3
41 34
#define ATOM_MAX_HW_I2C_READ  255
42 35

  
43
int radeon_atom_hw_i2c_xfer(device_t dev, struct iic_msg *msgs, u_int num);
44

  
45 36
static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
46 37
				 u8 slave_addr, u8 flags,
47 38
				 u8 *buf, u8 num)
......
111 102
	return r;
112 103
}
113 104

  
114
int radeon_atom_hw_i2c_xfer(device_t dev, struct iic_msg *msgs, u_int num)
105
int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
106
			    struct i2c_msg *msgs, int num)
115 107
{
116
	struct radeon_i2c_chan *i2c = device_get_softc(dev);
117
	struct iic_msg *p;
108
	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
109
	struct i2c_msg *p;
118 110
	int i, remaining, current_count, buffer_offset, max_bytes, ret;
119 111
	u8 flags;
120 112

  
......
122 114
	p = &msgs[0];
123 115
	if ((num == 1) && (p->len == 0)) {
124 116
		ret = radeon_process_i2c_ch(i2c,
125
					    p->slave, HW_I2C_WRITE,
117
					    p->addr, HW_I2C_WRITE,
126 118
					    NULL, 0);
127 119
		if (ret)
128 120
			return ret;
129 121
		else
130
			return (0);
122
			return num;
131 123
	}
132 124

  
133 125
	for (i = 0; i < num; i++) {
......
135 127
		remaining = p->len;
136 128
		buffer_offset = 0;
137 129
		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
138
		if (p->flags & IIC_M_RD) {
130
		if (p->flags & I2C_M_RD) {
139 131
			max_bytes = ATOM_MAX_HW_I2C_READ;
140 132
			flags = HW_I2C_READ;
141 133
		} else {
......
148 140
			else
149 141
				current_count = remaining;
150 142
			ret = radeon_process_i2c_ch(i2c,
151
						    p->slave, flags,
143
						    p->addr, flags,
152 144
						    &p->buf[buffer_offset], current_count);
153 145
			if (ret)
154 146
				return ret;
......
157 149
		}
158 150
	}
159 151

  
160
	return (0);
161
}
162

  
163
static int
164
radeon_atom_hw_i2c_probe(device_t dev)
165
{
166

  
167
	return (BUS_PROBE_SPECIFIC);
168
}
169

  
170
static int
171
radeon_atom_hw_i2c_attach(device_t dev)
172
{
173
	struct radeon_i2c_chan *i2c;
174
	device_t iic_dev;
175

  
176
	i2c = device_get_softc(dev);
177
	device_set_desc(dev, i2c->name);
178

  
179
	/* add generic bit-banging code */
180
	iic_dev = device_add_child(dev, "iicbus", -1);
181
	if (iic_dev == NULL)
182
		return (ENXIO);
183
	device_quiet(iic_dev);
184

  
185
	/* attach and probe added child */
186
	bus_generic_attach(dev);
187

  
188
	return (0);
152
	return num;
189 153
}
190 154

  
191
static int
192
radeon_atom_hw_i2c_detach(device_t dev)
155
u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
193 156
{
194
	/* detach bit-banding code. */
195
	bus_generic_detach(dev);
196

  
197
	/* delete bit-banding code. */
198
	device_delete_children(dev);
199
	return (0);
200
}
201

  
202
static int
203
radeon_atom_hw_i2c_reset(device_t dev, u_char speed,
204
    u_char addr, u_char *oldaddr)
205
{
206

  
207
	return (0);
157
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
208 158
}
209 159

  
210
static device_method_t radeon_atom_hw_i2c_methods[] = {
211
	DEVMETHOD(device_probe,		radeon_atom_hw_i2c_probe),
212
	DEVMETHOD(device_attach,	radeon_atom_hw_i2c_attach),
213
	DEVMETHOD(device_detach,	radeon_atom_hw_i2c_detach),
214
	DEVMETHOD(iicbus_reset,		radeon_atom_hw_i2c_reset),
215
	DEVMETHOD(iicbus_transfer,	radeon_atom_hw_i2c_xfer),
216
	DEVMETHOD_END
217
};
218

  
219
static driver_t radeon_atom_hw_i2c_driver = {
220
	"radeon_atom_hw_i2c",
221
	radeon_atom_hw_i2c_methods,
222
	0
223
};
224

  
225
static devclass_t radeon_atom_hw_i2c_devclass;
226
DRIVER_MODULE_ORDERED(radeon_atom_hw_i2c, drm, radeon_atom_hw_i2c_driver,
227
    radeon_atom_hw_i2c_devclass, NULL, NULL, SI_ORDER_ANY);
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/btc_dpm.c 2016-10-22 03:07:05.000000000 -0700
22 22
 * Authors: Alex Deucher
23 23
 */
24 24

  
25
#include <drm/drmP.h>
25
#include "drmP.h"
26 26
#include "radeon.h"
27 27
#include "radeon_asic.h"
28 28
#include "btcd.h"
......
51 51
struct rv7xx_power_info *rv770_get_pi(struct radeon_device *rdev);
52 52
struct evergreen_power_info *evergreen_get_pi(struct radeon_device *rdev);
53 53

  
54
extern int ni_mc_load_microcode(struct radeon_device *rdev);
55

  
54 56
//********* BARTS **************//
55 57
static const u32 barts_cgcg_cgls_default[] =
56 58
{
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/cayman_blit_shaders.h 2016-10-22 03:07:05.000000000 -0700
25 25
#ifndef CAYMAN_BLIT_SHADERS_H
26 26
#define CAYMAN_BLIT_SHADERS_H
27 27

  
28
extern const u32 cayman_ps[];
29
extern const u32 cayman_vs[];
28 30
extern const u32 cayman_default_state[];
29 31

  
32
extern const u32 cayman_ps_size, cayman_vs_size;
30 33
extern const u32 cayman_default_size;
31 34

  
32 35
#endif
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/ci_dpm.c 2016-10-22 03:07:05.000000000 -0700
22 22
 */
23 23

  
24 24
#include <linux/firmware.h>
25
#include <drm/drmP.h>
25
#include "drmP.h"
26 26
#include "radeon.h"
27 27
#include "radeon_asic.h"
28 28
#include "radeon_ucode.h"
29 29
#include "cikd.h"
30 30
#include "r600_dpm.h"
31 31
#include "ci_dpm.h"
32
#include "ni_dpm.h"
33 32
#include "atom.h"
34 33
#include <linux/seq_file.h>
35 34

  
......
163 162
	{ 0xFFFFFFFF }
164 163
};
165 164

  
165
extern u8 rv770_get_memory_module_index(struct radeon_device *rdev);
166
extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
167
				       u32 arb_freq_src, u32 arb_freq_dest);
168
extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
169
extern u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode);
170
extern void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev,
171
						     u32 max_voltage_steps,
172
						     struct atom_voltage_table *voltage_table);
173
extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev);
174
extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev);
175
extern int ci_mc_load_microcode(struct radeon_device *rdev);
176
extern void cik_update_cg(struct radeon_device *rdev,
177
			  u32 block, bool enable);
178

  
166 179
static int ci_get_std_voltage_value_sidd(struct radeon_device *rdev,
167 180
					 struct atom_voltage_table_entry *voltage_table,
168 181
					 u16 *std_voltage_hi_sidd, u16 *std_voltage_lo_sidd);
......
5701 5714

  
5702 5715
	/* mclk dpm is unstable on some R7 260X cards with the old mc ucode */
5703 5716
	if ((rdev->pdev->device == 0x6658) &&
5704
	    (rdev->mc_fw->datasize == (BONAIRE_MC_UCODE_SIZE * 4))) {
5717
	    (rdev->mc_fw->size == (BONAIRE_MC_UCODE_SIZE * 4))) {
5705 5718
		pi->mclk_dpm_key_disabled = 1;
5706 5719
	}
5707 5720

  
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/ci_dpm.h 2016-10-22 03:07:05.000000000 -0700
331 331
void ci_start_smc_clock(struct radeon_device *rdev);
332 332
bool ci_is_smc_running(struct radeon_device *rdev);
333 333
PPSMC_Result ci_send_msg_to_smc(struct radeon_device *rdev, PPSMC_Msg msg);
334
PPSMC_Result ci_wait_for_smc_inactive(struct radeon_device *rdev);
334 335
int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit);
335 336
int ci_read_smc_sram_dword(struct radeon_device *rdev,
336 337
			   u32 smc_address, u32 *value, u32 limit);
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/ci_smc.c 2016-10-22 03:07:05.000000000 -0700
23 23
 */
24 24

  
25 25
#include <linux/firmware.h>
26
#include <drm/drmP.h>
26
#include "drmP.h"
27 27
#include "radeon.h"
28 28
#include "cikd.h"
29 29
#include "ppsmc.h"
......
224 224
		ucode_start_address = le32_to_cpu(hdr->ucode_start_addr);
225 225
		ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);
226 226
		src = (const u8 *)
227
			((const char *)rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
227
			(rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
228 228
	} else {
229 229
		switch (rdev->family) {
230 230
		case CHIP_BONAIRE:
/home/xxxxxx/bstudy2/linux-4.7.10/drivers/gpu/drm/radeon/cik.c 2016-10-22 03:07:05.000000000 -0700
22 22
 * Authors: Alex Deucher
23 23
 */
24 24
#include <linux/firmware.h>
25
#include <linux/slab.h>
25 26
#include <linux/module.h>
26
#include <drm/drmP.h>
27
#include "drmP.h"
27 28
#include "radeon.h"
28 29
#include "radeon_asic.h"
29 30
#include "radeon_audio.h"
......
32 33
#include "cik_blit_shaders.h"
33 34
#include "radeon_ucode.h"
34 35
#include "clearstate_ci.h"
36
#include "radeon_kfd.h"
35 37

  
36 38
MODULE_FIRMWARE("radeon/BONAIRE_pfp.bin");
37 39
MODULE_FIRMWARE("radeon/BONAIRE_me.bin");
......
114 116
MODULE_FIRMWARE("radeon/mullins_rlc.bin");
115 117
MODULE_FIRMWARE("radeon/mullins_sdma.bin");
116 118

  
119
extern int r600_ih_ring_alloc(struct radeon_device *rdev);
120
extern void r600_ih_ring_fini(struct radeon_device *rdev);
121
extern void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *save);
122
extern void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save);
123
extern bool evergreen_is_display_hung(struct radeon_device *rdev);
124
extern void sumo_rlc_fini(struct radeon_device *rdev);
125
extern int sumo_rlc_init(struct radeon_device *rdev);
126
extern void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
127
extern void si_rlc_reset(struct radeon_device *rdev);
128
extern void si_init_uvd_internal_cg(struct radeon_device *rdev);
117 129
static u32 cik_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh);
130
extern int cik_sdma_resume(struct radeon_device *rdev);
131
extern void cik_sdma_enable(struct radeon_device *rdev, bool enable);
132
extern void cik_sdma_fini(struct radeon_device *rdev);
133
extern void vce_v2_0_enable_mgcg(struct radeon_device *rdev, bool enable);
118 134
static void cik_rlc_stop(struct radeon_device *rdev);
119 135
static void cik_pcie_gen3_enable(struct radeon_device *rdev);
120 136
static void cik_program_aspm(struct radeon_device *rdev);
......
124 140
static void cik_fini_cg(struct radeon_device *rdev);
125 141
static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev,
126 142
					  bool enable);
143

  
127 144
/**
128 145
 * cik_get_allowed_info_register - fetch the register for the info ioctl
129 146
 *
......
1868 1885

  
1869 1886
		regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2);
1870 1887
		new_io_mc_regs = (const __le32 *)
1871
			((const char *)rdev->mc_fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));
1888
			(rdev->mc_fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));
1872 1889
		ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;
1873 1890
		new_fw_data = (const __le32 *)
1874
			((const char *)rdev->mc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
1891
			(rdev->mc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
1875 1892
	} else {
1876
		ucode_size = rdev->mc_fw->datasize / 4;
1893
		ucode_size = rdev->mc_fw->size / 4;
1877 1894

  
1878 1895
		switch (rdev->family) {
1879 1896
		case CHIP_BONAIRE:
......
2043 2060

  
2044 2061
	DRM_INFO("Loading %s Microcode\n", new_chip_name);
2045 2062

  
2046
	ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_pfp", new_chip_name);
2063
	snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", new_chip_name);
2047 2064
	err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev);
2048 2065
	if (err) {
2049
		ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_pfp", chip_name);
2066
		snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", chip_name);
2050 2067
		err = request_firmware(&rdev->pfp_fw, fw_name, rdev->dev);
2051 2068
		if (err)
2052 2069
			goto out;
2053
		if (rdev->pfp_fw->datasize != pfp_req_size) {
2070
		if (rdev->pfp_fw->size != pfp_req_size) {
2054 2071
			printk(KERN_ERR
2055 2072
			       "cik_cp: Bogus length %zu in firmware \"%s\"\n",
2056
			       rdev->pfp_fw->datasize, fw_name);
2073
			       rdev->pfp_fw->size, fw_name);
2057 2074
			err = -EINVAL;
2058 2075
			goto out;
2059 2076
		}
......
2069 2086
		}
2070 2087
	}
2071 2088

  
2072
	ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_me", new_chip_name);
2089
	snprintf(fw_name, sizeof(fw_name), "radeon/%s_me.bin", new_chip_name);
2073 2090
	err = request_firmware(&rdev->me_fw, fw_name, rdev->dev);
2074 2091
	if (err) {
2075
		ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_me", chip_name);
2092
		snprintf(fw_name, sizeof(fw_name), "radeon/%s_me.bin", chip_name);
2076 2093
		err = request_firmware(&rdev->me_fw, fw_name, rdev->dev);
2077 2094
		if (err)
2078 2095
			goto out;
2079
		if (rdev->me_fw->datasize != me_req_size) {
2096
		if (rdev->me_fw->size != me_req_size) {
2080 2097
			printk(KERN_ERR
2081 2098
			       "cik_cp: Bogus length %zu in firmware \"%s\"\n",
2082
			       rdev->me_fw->datasize, fw_name);
2099
			       rdev->me_fw->size, fw_name);
2083 2100
			err = -EINVAL;
2084 2101
		}
2085 2102
	} else {
......
2094 2111
		}
2095 2112
	}
2096 2113

  
2097
	ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_ce", new_chip_name);
2114
	snprintf(fw_name, sizeof(fw_name), "radeon/%s_ce.bin", new_chip_name);
2098 2115
	err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev);
2099 2116
	if (err) {
2100
		ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_ce", chip_name);
2117
		snprintf(fw_name, sizeof(fw_name), "radeon/%s_ce.bin", chip_name);
2101 2118
		err = request_firmware(&rdev->ce_fw, fw_name, rdev->dev);
2102 2119
		if (err)
2103 2120
			goto out;
2104
		if (rdev->ce_fw->datasize != ce_req_size) {
2121
		if (rdev->ce_fw->size != ce_req_size) {
2105 2122
			printk(KERN_ERR
2106 2123
			       "cik_cp: Bogus length %zu in firmware \"%s\"\n",
2107
			       rdev->ce_fw->datasize, fw_name);
2124
			       rdev->ce_fw->size, fw_name);
2108 2125
			err = -EINVAL;
2109 2126
		}
2110 2127
	} else {
......
2119 2136
		}
2120 2137
	}
2121 2138

  
2122
	ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mec", new_chip_name);
2139
	snprintf(fw_name, sizeof(fw_name), "radeon/%s_mec.bin", new_chip_name);
2123 2140
	err = request_firmware(&rdev->mec_fw, fw_name, rdev->dev);
2124 2141
	if (err) {
2125
		ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mec", chip_name);
2142
		snprintf(fw_name, sizeof(fw_name), "radeon/%s_mec.bin", chip_name);
2126 2143
		err = request_firmware(&rdev->mec_fw, fw_name, rdev->dev);
2127 2144
		if (err)
2128 2145
			goto out;
2129
		if (rdev->mec_fw->datasize != mec_req_size) {
2146
		if (rdev->mec_fw->size != mec_req_size) {
2130 2147
			printk(KERN_ERR
2131 2148
			       "cik_cp: Bogus length %zu in firmware \"%s\"\n",
2132
			       rdev->mec_fw->datasize, fw_name);
2149
			       rdev->mec_fw->size, fw_name);
2133 2150
			err = -EINVAL;
2134 2151
		}
2135 2152
	} else {
......
2145 2162
	}
2146 2163

  
2147 2164
	if (rdev->family == CHIP_KAVERI) {
2148
		ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mec2", new_chip_name);
2165
		snprintf(fw_name, sizeof(fw_name), "radeon/%s_mec2.bin", new_chip_name);
2149 2166
		err = request_firmware(&rdev->mec2_fw, fw_name, rdev->dev);
2150 2167
		if (err) {
2151 2168
			goto out;
......
2159 2176
		}
2160 2177
	}
2161 2178

  
2162
	ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_rlc", new_chip_name);
2179
	snprintf(fw_name, sizeof(fw_name), "radeon/%s_rlc.bin", new_chip_name);
2163 2180
	err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev);
2164 2181
	if (err) {
2165
		ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_rlc", chip_name);
2182
		snprintf(fw_name, sizeof(fw_name), "radeon/%s_rlc.bin", chip_name);
2166 2183
		err = request_firmware(&rdev->rlc_fw, fw_name, rdev->dev);
2167 2184
		if (err)
2168 2185
			goto out;
2169
		if (rdev->rlc_fw->datasize != rlc_req_size) {
2186
		if (rdev->rlc_fw->size != rlc_req_size) {
2170 2187
			printk(KERN_ERR
2171 2188
			       "cik_rlc: Bogus length %zu in firmware \"%s\"\n",
2172
			       rdev->rlc_fw->datasize, fw_name);
2189
			       rdev->rlc_fw->size, fw_name);
2173 2190
			err = -EINVAL;
2174 2191
		}
2175 2192
	} else {
......
2184 2201
		}
2185 2202
	}
2186 2203

  
2187
	ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_sdma", new_chip_name);
2204
	snprintf(fw_name, sizeof(fw_name), "radeon/%s_sdma.bin", new_chip_name);
2188 2205
	err = request_firmware(&rdev->sdma_fw, fw_name, rdev->dev);
2189 2206
	if (err) {
2190
		ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_sdma", chip_name);
2207
		snprintf(fw_name, sizeof(fw_name), "radeon/%s_sdma.bin", chip_name);
2191 2208
		err = request_firmware(&rdev->sdma_fw, fw_name, rdev->dev);
2192 2209
		if (err)
2193 2210
			goto out;
2194
		if (rdev->sdma_fw->datasize != sdma_req_size) {
2211
		if (rdev->sdma_fw->size != sdma_req_size) {
2195 2212
			printk(KERN_ERR
2196 2213
			       "cik_sdma: Bogus length %zu in firmware \"%s\"\n",
2197
			       rdev->sdma_fw->datasize, fw_name);
2214
			       rdev->sdma_fw->size, fw_name);
2198 2215
			err = -EINVAL;
2199 2216
		}
2200 2217
	} else {
......
2211 2228

  
2212 2229
	/* No SMC, MC ucode on APUs */
2213 2230
	if (!(rdev->flags & RADEON_IS_IGP)) {
2214
		ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mc", new_chip_name);
2231
		snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", new_chip_name);
2215 2232
		err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
2216 2233
		if (err) {
2217
			ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mc2", chip_name);
2234
			snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name);
2218 2235
			err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
2219 2236
			if (err) {
2220
				ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_mc", chip_name);
2237
				snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
2221 2238
				err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev);
2222 2239
				if (err)
2223 2240
					goto out;
2224 2241
			}
2225
			if ((rdev->mc_fw->datasize != mc_req_size) &&
2226
			    (rdev->mc_fw->datasize != mc2_req_size)){
2242
			if ((rdev->mc_fw->size != mc_req_size) &&
2243
			    (rdev->mc_fw->size != mc2_req_size)){
2227 2244
				printk(KERN_ERR
2228 2245
				       "cik_mc: Bogus length %zu in firmware \"%s\"\n",
2229
				       rdev->mc_fw->datasize, fw_name);
2246
				       rdev->mc_fw->size, fw_name);
2230 2247
				err = -EINVAL;
2231 2248
			}
2232
			DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->datasize);
2249
			DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size);
2233 2250
		} else {
2234 2251
			err = radeon_ucode_validate(rdev->mc_fw);
2235 2252
			if (err) {
......
2242 2259
			}
2243 2260
		}
2244 2261

  
2245
		ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_smc", new_chip_name);
2262
		snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", new_chip_name);
2246 2263
		err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
2247 2264
		if (err) {
2248
			ksnprintf(fw_name, sizeof(fw_name), "radeonkmsfw_%s_smc", chip_name);
2265
			snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name);
2249 2266
			err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev);
2250 2267
			if (err) {
2251 2268
				printk(KERN_ERR
......
2254 2271
				release_firmware(rdev->smc_fw);
2255 2272
				rdev->smc_fw = NULL;
2256 2273
				err = 0;
2257
			} else if (rdev->smc_fw->datasize != smc_req_size) {
2274
			} else if (rdev->smc_fw->size != smc_req_size) {
2258 2275
				printk(KERN_ERR
2259 2276
				       "cik_smc: Bogus length %zu in firmware \"%s\"\n",
2260
				       rdev->smc_fw->datasize, fw_name);
2277
				       rdev->smc_fw->size, fw_name);
2261 2278
				err = -EINVAL;
2262 2279
			}
2263 2280
		} else {
......
2310 2327
	return err;
2311 2328
}
2312 2329

  
2313
/**
2314
 * cik_fini_microcode - drop the firmwares image references
2315
 *
2316
 * @rdev: radeon_device pointer
2317
 *
2318
 * Drop the pfp, me, mec, mec2, rlc, sdma, mc, smc and ce firmware image references.
2319
 * Called at driver shutdown.
2320
 */
2321
static void cik_fini_microcode(struct radeon_device *rdev)
2322
{
2323
	release_firmware(rdev->pfp_fw);
2324
	rdev->pfp_fw = NULL;
2325
	release_firmware(rdev->me_fw);
2326
	rdev->me_fw = NULL;
2327
	release_firmware(rdev->ce_fw);
2328
	rdev->ce_fw = NULL;
2329
	release_firmware(rdev->mec_fw);
2330
	rdev->mec_fw = NULL;
2331
	release_firmware(rdev->mec2_fw);
2332
	rdev->mec2_fw = NULL;
2333
	release_firmware(rdev->rlc_fw);
2334
	rdev->rlc_fw = NULL;
2335
	release_firmware(rdev->sdma_fw);
2336
	rdev->sdma_fw = NULL;
2337
	release_firmware(rdev->mc_fw);
2338
	rdev->mc_fw = NULL;
2339
	release_firmware(rdev->smc_fw);
2340
	rdev->smc_fw = NULL;
2341
}
2342

  
2343 2330
/*
2344 2331
 * Core functions
2345 2332
 */
......
3712 3699
 * @src_offset: src GPU address
3713 3700
 * @dst_offset: dst GPU address
3714 3701
 * @num_gpu_pages: number of GPU pages to xfer
3715
 * @fence: radeon fence object
3702
 * @resv: reservation object to sync to
3716 3703
 *
3717 3704
 * Copy GPU paging using the CP DMA engine (CIK+).
3718 3705
 * Used by the radeon ttm implementation to move pages if
3719 3706
 * registered as the asic copy callback.
3720 3707
 */
3721
int cik_copy_cpdma(struct radeon_device *rdev,
3708
struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev,
3722 3709
		   uint64_t src_offset, uint64_t dst_offset,
3723 3710
		   unsigned num_gpu_pages,
3724
		   struct radeon_fence **fence)
3711
				    struct reservation_object *resv)
3725 3712
{
3726
	struct radeon_semaphore *sem = NULL;
3713
	struct radeon_fence *fence;
3714
	struct radeon_sync sync;
3727 3715
	int ring_index = rdev->asic->copy.blit_ring_index;
3728 3716
	struct radeon_ring *ring = &rdev->ring[ring_index];
3729 3717
	u32 size_in_bytes, cur_size_in_bytes, control;
3730 3718
	int i, num_loops;
3731 3719
	int r = 0;
3732 3720

  
3733
	r = radeon_semaphore_create(rdev, &sem);
3734
	if (r) {
3735
		DRM_ERROR("radeon: moving bo (%d).\n", r);
3736
		return r;
3737
	}
3721
	radeon_sync_create(&sync);
3738 3722

  
3739 3723
	size_in_bytes = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT);
3740 3724
	num_loops = DIV_ROUND_UP(size_in_bytes, 0x1fffff);
3741 3725
	r = radeon_ring_lock(rdev, ring, num_loops * 7 + 18);
3742 3726
	if (r) {
3743 3727
		DRM_ERROR("radeon: moving bo (%d).\n", r);
3744
		radeon_semaphore_free(rdev, &sem, NULL);
3745
		return r;
3728
		radeon_sync_free(rdev, &sync, NULL);
3729
		return ERR_PTR(r);
3746 3730
	}
3747 3731

  
3748
	radeon_semaphore_sync_to(sem, *fence);
3749
	radeon_semaphore_sync_rings(rdev, sem, ring->idx);
3732
	radeon_sync_resv(rdev, &sync, resv, false);
3733
	radeon_sync_rings(rdev, &sync, ring->idx);
3750 3734

  
3751 3735
	for (i = 0; i < num_loops; i++) {
3752 3736
		cur_size_in_bytes = size_in_bytes;
......
3767 3751
		dst_offset += cur_size_in_bytes;
3768 3752
	}
3769 3753

  
3770
	r = radeon_fence_emit(rdev, fence, ring->idx);
3754
	r = radeon_fence_emit(rdev, &fence, ring->idx);
3771 3755
	if (r) {
3772 3756
		radeon_ring_unlock_undo(rdev, ring);
3773
		radeon_semaphore_free(rdev, &sem, NULL);
3774
		return r;
3757
		radeon_sync_free(rdev, &sync, NULL);
3758
		return ERR_PTR(r);
3775 3759
	}
3776 3760

  
3777 3761
	radeon_ring_unlock_commit(rdev, ring, false);
... This diff was truncated because it exceeds the maximum size that can be displayed.