Submit #2456

AVX Instruction Set Support

Added by adamsaka over 1 year ago. Updated over 1 year ago.

Status:ClosedStart date:11/15/2012
Priority:NormalDue date:
Assignee:alexh% Done:

0%

Category:-
Target version:-

Description

This patch enables operating system support for the AVX instruction set for the 64-bit version of Dragonfly BSD. AVX includes new CPU registers. These registers need to be saved and restored during a context switch. This patch should also support the future AVX2 instruction set.

Specifically:

1. A new configuration option is added. CPU_ENABLE_AVX. It is disabled by default. When it is disabled this patch will have practically no effect.
2. When you enable this option you will need to compile with gcc4.7 or later.
3. The CPU will be checked for XSAVE and AVX support on boot. If both are found they will be enabled.
4. If enabled, the FPU registers including the new 256-bit YMM registers will be saved using the new XSAVE function. (Otherwise it will revert to the former the former FPU code).

Issues:
1. The kernel does not check the CPU for the size of the XSAVE structure. I didn't attempt to do this because I didn't want to mess too much with the existing FPU code. This only has an effect if someone wishes to add support for new CPU features that use the XSAVE interface. They will need to manually allocate space for this structure. I checked the FreeBSD AVX patch and it does the same thing.

2. Compilation is restricted to gcc4.7 or later. (Actually 4.6 probably works but I haven't checked as its not part of our system). The FreeBSD patch directly includes machine code to support older compilers. I thought it more elegant to use readable assembler. Besides, if users don't have a new compiler, they can't compile AVX support for their programs. The kernel still compiles fine on gcc4.4 with the configuration option disabled. I suggest that AVX support become the default when gcc4.7 becomes Dragonfly's default compiler.

0001-AVX-Instruction-Set-Support.patch Magnifier (12 KB) adamsaka, 11/15/2012 06:18 AM

History

#1 Updated by alexh over 1 year ago

FWIW, we use direct bytecodes elsewhere as well instead of relying on the compiler or assembler understanding the mnemonic. There's nothing wrong with that as long as there's a comment saying which instruction it is.

You may want to consider using the direct bytecodes and enabling the option by default, simply using a feature check to switch between the different methods. That way there'd be no need to change the setting whenever X compiler becomes default, and people that already use a different compiler for some user programs can take advantage of AVX *now*.

In any case, thanks for the good work!

HTH,
Alex

#2 Updated by alexh over 1 year ago

  • Status changed from New to In Progress
  • Assignee set to alexh

I'll probably commit this, but I'll be changing it to use direct byte codes so we don't have to rely on gcc 4.7 being used.

Cheers,
Alex

#3 Updated by adamsaka over 1 year ago

Sorry I didn't reply to your earlier message I have been away.

Yes, I think if there is likely to be a delay until gcc4.7 is default it may be worth including machine code. I don't have much knowledge of coding this, so please feel free to do it.

In that case, perhaps the config option could be changed to a DISABLE option rather than an ENABLE option, and become the default. This would be more consistent with the config options for disabling the SSE instruction set. Feel free to do it as you think is best.

#4 Updated by alexh over 1 year ago

a DISABLE option makes sense as we can safely test for availability of AVX support on boot - so I'll go for that.

Do you happen to have a small test case for this?

Cheers,
Alex

#5 Updated by alexh over 1 year ago

  • Status changed from In Progress to Closed

I've committed a modified version in 5cf56a8d44d83fcd14e7af7e5eaf6af2356c3d7a.

Thanks!

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