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Submit #2456

closed

AVX Instruction Set Support

Added by adamsaka over 11 years ago. Updated about 11 years ago.

Status:
Closed
Priority:
Normal
Assignee:
Category:
-
Target version:
-
Start date:
11/15/2012
Due date:
% Done:

0%

Estimated time:

Description

This patch enables operating system support for the AVX instruction set for the 64-bit version of Dragonfly BSD. AVX includes new CPU registers. These registers need to be saved and restored during a context switch. This patch should also support the future AVX2 instruction set.

Specifically:

1. A new configuration option is added. CPU_ENABLE_AVX. It is disabled by default. When it is disabled this patch will have practically no effect.
2. When you enable this option you will need to compile with gcc4.7 or later.
3. The CPU will be checked for XSAVE and AVX support on boot. If both are found they will be enabled.
4. If enabled, the FPU registers including the new 256-bit YMM registers will be saved using the new XSAVE function. (Otherwise it will revert to the former the former FPU code).

Issues:
1. The kernel does not check the CPU for the size of the XSAVE structure. I didn't attempt to do this because I didn't want to mess too much with the existing FPU code. This only has an effect if someone wishes to add support for new CPU features that use the XSAVE interface. They will need to manually allocate space for this structure. I checked the FreeBSD AVX patch and it does the same thing.

2. Compilation is restricted to gcc4.7 or later. (Actually 4.6 probably works but I haven't checked as its not part of our system). The FreeBSD patch directly includes machine code to support older compilers. I thought it more elegant to use readable assembler. Besides, if users don't have a new compiler, they can't compile AVX support for their programs. The kernel still compiles fine on gcc4.4 with the configuration option disabled. I suggest that AVX support become the default when gcc4.7 becomes Dragonfly's default compiler.


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